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STLC2500ATR 数据表(PDF) 30 Page - STMicroelectronics |
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STLC2500ATR 数据表(HTML) 30 Page - STMicroelectronics |
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30 / 37 page ![]() Digital interfaces STLC2500A 30/37 7 Digital interfaces 7.1 The UART interface The STLC2500A contains a 4-pin (UART_RXD, UART_TXD, UART_RTS, and UART_CTS) UART compatible with 16450, 16550 and 16750 standards. It is running up to 1842 kbps (+1.5%/-1%). The configuration is 8 data bits, 1 start bit, 1 stop bit, and no parity bit. 128-byte FIFO with configurable threshold interrupts for low CPU load and high throughput. Auto RTS/CTS is implemented in HW, controllable by SW. The UART accepts all HCI commands as described in the Bluetooth specification, it supports H4 proprietary commands and the 4-wire UART sleep mode. The complete list of supported proprietary HCI commands is available in the STLC2500A Software Interface document. Table 19 contains the list of supported baud rates selectable by HCI commands. The default baud rate is 115200 [bps]. 7.2 The PCM interface The chip contains a 4-pin (PCM_CLK, PCM_SYNC, PCM_A, and PCM_B) direct voice interface to connect to standard CODEC including internal decimator and interpolator filters. The implementation is compliant with the MP-PCM requirements for voice transfer (8 kHz PCM_SYNC and 8 or 16 bits data). The four signals of the PCM interface are: – PCM_CLK: PCM clock – PCM_SYNC: PCM 8 kHz sync (every 125 µs) – PCM_A: PCM data – PCM_B: PCM data The data can be linear PCM (13-16 bit), µ-Law (8 bit) or A-Law (8bit). The interface can be programmed as Master or as Slave via specific HCI commands. Two additional PCM_SYNC signals can be provided via the GPIOs. See Section 7.4 for more details. Table 19. List of supported baud rates Baud rate Baud rate (contined) Baud rate (contined) 1842 k 57.6 k 4800 921.6 k 38.4 k 2400 460.8 k 28.8 k 1800 230.4 k 19.2 k 1200 153.6 k 14.4 k 900 115.2 k (default) 9600 600 76.8 k 7200 300 |
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