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TDA4AL...ALZQ1 数据表(PDF) 102 Page - Texas Instruments |
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TDA4AL...ALZQ1 数据表(HTML) 102 Page - Texas Instruments |
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102 / 251 page ![]() 7.3 Recommended Operating Conditions (continued) over operating free-air temperature range (unless otherwise noted) SUPPLY NAME(2) DESCRIPTION MIN(1) NOM MAX(1) UNIT VDDA_1P8_MLB MLB IO supply (6-pin interface) 1.71 1.8 1.89 V VDDA_TEMP_0 Analog supply for temperature sensor 0 1.71 1.8 1.89 V VDDA_TEMP_1 Analog supply for temperature sensor 1 1.71 1.8 1.89 V VDDA_TEMP_2 Analog supply for temperature sensor 2 1.71 1.8 1.89 V VDDA_TEMP_3 Analog supply for temperature sensor 3 1.71 1.8 1.89 V VDDA_TEMP_4 Analog supply for temperature sensor 4 1.71 1.8 1.89 V VDDA_OSC1 Analog supply for HFOSC1 1.71 1.8 1.89 V VDDA_* Peak to Peak Noise for all VDDA inputs 25 mV VDDS_DDR (3) DDR inteface power supply 1.06 1.1 1.15 V VDDS_DDR_C0 IO power for DDR0 Memory Clock Bit (MCB) macro 1.06 1.1 1.15 V VDDS_DDR_C1 IO power for DDR1 Memory Clock Bit (MCB) macro 1.06 1.1 1.15 V VDDS_MMC0 MMC0 IO supply 1.71 1.8 1.89 V VDDSHV0 IO supply for main domain general 1.8-V operation 1.71 1.8 1.89 V 3.3-V operation 3.14 3.3 3.46 V VDDSHV0_MCU IO supply MCUSS general IO group, and MCU and Main domain warm reset pins 1.8-V operation 1.71 1.8 1.89 V 3.3-V operation 3.14 3.3 3.46 V VDDSHV1_MCU(6) IO supply for MCUSS IO group 1 1.8-V operation 1.71 1.8 1.89 V 3.3-V operation 3.14 3.3 3.46 V VDDSHV2 IO supply for main domain IO group 2 1.8-V operation 1.71 1.8 1.89 V 3.3-V operation 3.14 3.3 3.46 V VDDSHV2_MCU IO supply for MCUSS IO group 2 1.8-V operation 1.71 1.8 1.89 V 3.3-V operation 3.14 3.3 3.46 V VDDSHV5 IO supply for main domain IO group 5 1.8-V operation 1.71 1.8 1.89 V 3.3-V operation 3.14 3.3 3.46 V USB0_VBUS Voltage range for USB VBUS comparator input 0 See (7) 3.46 V USB0_ID Voltage range for the USB ID input See (4) V VSS Ground 0 V TJ Operating junction temperature range Automotive -40 125 °C Extended -40 105 °C Commercial 0 90 °C (1) The voltage at the device ball must never be below the MIN voltage or above the MAX voltage for any amount of time. This requirement includes dynamic voltage events such as AC ripple, voltage transients, voltage dips, and so forth. (2) Refer to Power-On-Hour (POH) Limits for limitations. (3) VDDS_DDR is required to still be powered with LPDDR4 voltage ranges, even If DDR interface is unused. (4) This terminal is connected to analog circuits in the respective USB PHY. The circuit sources a known current while measuring the voltage to determine if the terminal is connected to VSS with a resistance less than 10 Ω or greater than 100 kΩ. The terminal should be connected to ground for USB host operation or open-circuit for USB peripheral operation, and should never be connected to any external voltage source. (5) The AVS Voltages are device-dependent, voltage domain-dependent, and OPP-dependent. They must be read from the VTM_DEVINFO_VDn. For information about VTM_DEVINFO_VDn Registers address, please refer to Voltage and Thermal Manager section in the device TRM. The power supply should be adjustable over the ranges shown in the VDD_CPU AVS Range entry. (6) When DDR1 is used concurrently with either OSPI0 or Hyperbus, VDDSHV1_MCU is limited to 1.8V (3.3V mode not supported if DDR1 is used in the system.) (7) An external resistor divider is required to limit the voltage applied to this device pin. For more information, see USB VBUS Design Guidelines. TDA4VE-Q1, TDA4AL-Q1, TDA4VL-Q1 SPRSP62 – DECEMBER 2022 www.ti.com 102 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TDA4VE-Q1 TDA4AL-Q1 TDA4VL-Q1 |
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