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KSZ9563RNXC 数据表(PDF) 169 Page - Microchip Technology |
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KSZ9563RNXC 数据表(HTML) 169 Page - Microchip Technology |
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169 / 226 page  2017-2018 Microchip Technology Inc. DS00002419D-page 169 KSZ9563R 5.2.7.6 Port Priority to Queue Mapping Register Address: 0xN808 - 0xN80B Port N: 1-3 Size: 32 bits Bits Description Type Default 31:28 Regenerated priority (queue) value for priority 7. The 2 most significant bits are reserved. R/W xx11b 27:24 Regenerated priority (queue) value for priority 6. The 2 most significant bits are reserved. R/W xx11b 23:20 Regenerated priority (queue) value for priority 5. The 2 most significant bits are reserved. R/W xx10b 19:16 Regenerated priority (queue) value for priority 4. The 2 most significant bits are reserved. R/W xx10b 15:12 Regenerated priority (queue) value for priority 3. The 2 most significant bits are reserved. R/W xx01b 11:8 Regenerated priority (queue) value for priority 2. The 2 most significant bits are reserved. R/W xx01b 7:4 Regenerated priority (queue) value for priority 1. The 2 most significant bits are reserved. R/W xx00b 3:0 Regenerated priority (queue) value for priority 0. The 2 most significant bits are reserved. R/W xx00b |
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