5.2.1

Random address read

A dummy write is first performed to load the address into this address counter (as shown in Figure 10) but without

sending a stop condition. Then, the bus master sends another start condition, and repeats the device select code,

with the RW bit set to 1. The device acknowledges this, and outputs the contents of the addressed byte. The bus

master must not acknowledge the byte, and terminates the transfer with a stop condition.

5.2.2

Current address read

For the current address read operation, following a start condition, the bus master only sends a device select

code with the RW bit set to 1. The device acknowledges this, and outputs the byte addressed by the internal

address counter. The counter is then incremented. The bus master terminates the transfer with a stop condition,

as shown in Figure 10, without acknowledging the byte.

Note that the address counter value is defined by instructions accessing either the memory or the identification

page. When accessing the Identification page, the address counter value is loaded with the byte location in the

identification page, therefore the next current address read in the memory uses this new address counter value.

When accessing the memory, it is safer to always use the random address read instruction (this instruction loads

the address counter with the byte location to read in the memory, see Section 5.2.1 Random address read)

instead of the current address Read instruction.

5.2.3

Sequential read

This operation can be used after a current address read or a random address read. The bus master does

acknowledge the data byte output, and sends additional clock pulses so that the device continues to output the

next byte in sequence. To terminate the stream of bytes, the bus master must not acknowledge the last byte, and

must generate a Stop condition, as shown in Figure 10.

The output data comes from consecutive addresses, with the internal address counter automatically incremented

after each byte output. After the last memory address, the address counter “rolls-over”, and the device continues

to output data from memory address 00h.

5.3

Read identification page (M24512-D only)

The identification page (128 bytes) is an additional page which can be written and (later) permanently locked in

Read-only mode.

The identification page can be read by issuing an read identification page instruction. This instruction uses the

same protocol and format as the random address read (from memory array) with device type identifier defined as

1011b. The MSB address bits A15/A7 are don't care, the LSB address bits A6/A0 define the byte address inside

the identification page. The number of bytes to read in the ID page must not exceed the page boundary (e.g.:

when reading the identification page from location 100d, the number of bytes should be less than or equal to 28,

as the ID page boundary is 128 bytes).

M24512-W M24512-R M24512-DF

Read identification page (M24512-D only)

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