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M24C02-R 数据表(PDF) 9 Page - STMicroelectronics |
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M24C02-R 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 41 page ![]() 4.5 Device addressing To start communication between the bus master and the slave device, the bus master must initiate a Start condition. Following this, the bus master sends the device select code, shown in Table 2 (most significant bit first). Note: When using the DFN5 package: • The Ei pins are not accessible. • To properly communicate with the device, the E0, E1 and E2 bits must always be set to logic 0 for any operation. See Table 2. • No other I2C device using address 1010 xxxx (x = don't care) can be connected to the same bus. Table 2. Device select code Package Device type identifier(1) Chip Enable address RW b7 b6 b5 b4 b3 b2 b1 b0 TSSOP8,SO8N, UFDFPN8 1 0 1 0 E2 E1 E0 RW DFN5 1 0 1 0 0 0 0 RW 1. The MSB, b7, is sent first. The 8th bit is the Read/Write bit (RW). This bit is set to 1 for read and 0 for write operations. If a match occurs on the device select code, the corresponding device gives an acknowledgement on serial data (SDA) during the 9th bit time. If the device does not match the device select code, it deselects itself from the bus, and goes into standby mode. M24C01/02-W M24C01/02-R M24C02-F Device addressing DS9398 - Rev 7 page 9/41 |
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