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M95128-R 数据表(PDF) 7 Page - STMicroelectronics |
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M95128-R 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 48 page  4.1 SPI modes These devices can be driven by a microcontroller with its SPI peripheral running in either of the following two modes: • CPOL = 0, CPHA = 0 • CPOL = 1, CPHA = 1 For these two modes, input data is latched in on the rising edge of Serial clock (C), and output data is available from the falling edge of Serial clock (C). The difference between the two modes, as shown in Figure 6. SPI modes supported, is the clock polarity when the bus master is in Stand-by mode and not transferring data: • C remains at 0 for (CPOL = 0, CPHA = 0) • C remains at 1 for (CPOL = 1, CPHA = 1) Figure 6. SPI modes supported MSB MSB C D Q C CPOL 0 1 CPHA 0 1 M95128-W M95128-R M95128-DF SPI modes DS1356 - Rev 20 page 7/48 |
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