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M95128-R 数据表(PDF) 31 Page - STMicroelectronics

部件名 M95128-R
功能描述  128-Kbit serial SPI bus EEPROM with high-speed clock
PDF  48 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M95128-R 数据表(HTML) 31 Page - STMicroelectronics

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Table 21. AC characteristics (M95128-DF, device grade 6)
Test conditions specified in Table 11
Symbol
Alt.
Parameter
VCC ≥ 1.7V
VCC ≥ 2.5V
VCC≥ 4.5V
Unit
Min.
Max.
Min.
Max.
Min.
Max.
fC
fSCK
Clock frequency
-
5
-
10
-
20
MHz
tSLCH
tCSS1 S active setup time
60
-
30
-
15
-
ns
tSHCH
tCSS2 S not active setup time
60
-
30
-
15
-
ns
tSHSL
tCS
S deselect time
90
-
40
-
20
-
ns
tCHSH
tCSH S active hold time
60
-
30
-
15
-
ns
tCHSL
-
S not active hold time
60
-
30
-
15
-
ns
tCH (1)
tCLH
Clock high time
80
-
40
-
20
-
ns
tCL(1)
tCLL
Clock low time
80
-
40
-
20
-
ns
tCLCH (2)
tRC
Clock rise time
-
2
-
2
-
2
µs
tCHCL
tFC
Clock fall time
-
2
-
2
-
2
µs
tDVCH
tDSU Data in setup time
20
-
10
-
5
-
ns
tCHDX
tDH
Data in hold time
20
-
10
-
10
-
ns
tHHCH
-
Clock low hold time after HOLD not active
60
-
30
-
15
-
ns
tHLCH
-
Clock low hold time after HOLD active
60
-
30
-
15
-
ns
tCLHL
-
Clock low setup time before HOLD active
0
-
0
-
0
-
ns
tCLHH
-
Clock low setup time before HOLD not active
0
-
0
-
0
-
ns
tSHQZ(2)
tDIS
Output disable time
-
80
-
40
-
20
ns
tCLQV
tV
Clock low to output valid
-
80
-
40
-
20
ns
tCLQX
tHO
Output hold time
0
-
0
-
0
-
ns
tHHQV
tLZ
HOLD high to output valid
-
80
-
40
-
20
ns
tHLQZ(2)
tHZ
HOLD low to output High-Z
-
80
-
40
-
20
ns
tW
tWC
Write time
-
5
-
5
-
5
ms
1. tCH + tCL must never be less than the shortest possible clock period, 1 / fC(max).
2. Characterized only, not tested in production.
M95128-W M95128-R M95128-DF
DC and AC parameters
DS1356 - Rev 20
page 31/48



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