P80C32 datasheet(34/62 Pages) PHILIPS

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Philips Semiconductors

Product data

P80C3xX2; P80C5xX2;

P87C5xX2

80C51 8-bit microcontroller family

4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),

low power, high speed (30/33 MHz)

2003 Jan 24

EX0

Enable Bit = 1 enables the interrupt.

Enable Bit = 0 disables it.

BIT

SYMBOL

FUNCTION

IE.7

Global disable bit. If EA = 0, all interrupts are disabled. If EA = 1, each interrupt can be individually

enabled or disabled by setting or clearing its enable bit.

IE.6

—

Not implemented. Reserved for future use.

IE.5

ET2

Timer 2 interrupt enable bit.

IE.4

Serial Port interrupt enable bit.

IE.3

ET1

Timer 1 interrupt enable bit.

IE.2

EX1

External interrupt 1 enable bit.

IE.1

ET0

Timer 0 interrupt enable bit.

IE.0

EX0

External interrupt 0 enable bit.

SU01522

ET0

EX1

ET1

ET2

—

Address = 0A8H

Bit Addressable

Reset Value = 0X000000B

Figure 22. Interrupt Enable (IE) Register

PX0

Priority Bit = 1 assigns higher priority

Priority Bit = 0 assigns lower priority

BIT

SYMBOL

FUNCTION

IP.7

—

Not implemented, reserved for future use.

IP.6

—

Not implemented, reserved for future use.

IP.5

PT2

Timer 2 interrupt priority bit.

IP.4

Serial Port interrupt priority bit.

IP.3

PT1

Timer 1 interrupt priority bit.

IP.2

PX1

External interrupt 1 priority bit.

IP.1

PT0

Timer 0 interrupt priority bit.

IP.0

PX0

External interrupt 0 priority bit.

SU01523

PT0

PX1

PT1

PT2

—

Address = 0B8H

Bit Addressable

Reset Value = xx000000B

Figure 23. Interrupt Priority (IP) Register

PX0H

Priority Bit = 1 assigns higher priority

Priority Bit = 0 assigns lower priority

BIT

SYMBOL

FUNCTION

IPH.7

—

Not implemented, reserved for future use.

IPH.6

—

Not implemented, reserved for future use.

IPH.5

PT2H

Timer 2 interrupt priority bit high.

IPH.4

PSH

Serial Port interrupt priority bit high.

IPH.3

PT1H

Timer 1 interrupt priority bit high.

IPH.2

PX1H

External interrupt 1 priority bit high.

IPH.1

PT0H

Timer 0 interrupt priority bit high.

IPH.0

PX0H

External interrupt 0 priority bit high.

SU01524

PT0H

PX1H

PT1H

PSH

PT2H

—

IPH

Address = B7H

Bit Addressable

Reset Value = xx000000B

Figure 24. Interrupt Priority HIGH (IPH) Register

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