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AD5378ABC 数据表(PDF) 26 Page - Analog Devices |
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AD5378ABC 数据表(HTML) 26 Page - Analog Devices |
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26 / 28 page ![]() AD5378 Rev. PrA | Page 26 of 28 POWER SUPPLY DECOUPLING In any circuit where accuracy is important, careful considera- tion of the power supply and ground return layout helps to ensure the rated performance. The printed circuit board on which the AD5378 is mounted should be designed so that the analog and digital sections are separated and confined to certain areas of the board. If the AD5378 is in a system where multiple devices require an AGND-to-DGND connection, the connection should be made at one point only. The star ground point should be established as close as possible to the device. For supplies with multiple pins (VSS, VDD, VCC), it is recom- mended to tie these pins together and to decouple each supply once. The AD5378 should have ample supply decoupling of 10 µF in parallel with 0.1 µF on each supply located as close to the package as possible, ideally right up against the device. The 10 µF capacitors are the tantalum bead type. The 0.1 µF capaci- tor should have low effective series resistance (ESR) and effective series inductance (ESI), such as the common ceramic types that provide a low impedance path to ground at high frequencies, to handle transient currents due to internal logic switching. Digital lines running under the device should be avoided, because these couple noise onto the device. The analog ground plane should be allowed to run under the AD5378 to avoid noise coupling. The power supply lines of the AD5378 should use as large a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching digital signals should be shielded with digital ground to avoid radiating noise to other parts of the board, and should never be run near the reference inputs. It is essential to mini- mize noise on all VREF(+) and VREF(−) lines. The VBIAS pin should be decoupled with a 10 nF capacitor to AGND. Avoid crossover of digital and analog signals. Traces on opposite sides of the board should run at right angles to each other. This reduces the effects of feedthrough through the board. A microstrip technique is by far the best, but not always possible with a double-sided board. In this technique, the component side of the board is dedicated to ground plane, while signal traces are placed on the solder side. As for all thin packages, care must be taken to avoid flexing the CSPBGA package and to avoid a point load on the surface of this package during the assembly process. POWER-ON An on-chip power supply monitor makes the AD5378 robust to power sequencing. The supply monitor powers up the analog section after (VDD − VSS) is greater than 7 V (typical). The output buffers power up in CLR mode forced to the DUTGND potential, even if VCC remains at 0 V. After VSS is applied, the analog circuitry powers up and the buffered DAC output level settles linearly within the supply range. |
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