R2000 datasheet(37/75 Pages) ETC

37 / 75 page

Indy® R2000 Electrical, Mechanical, & Thermal Specification

Addr.

Name

R/W

Bit

Description

Reset

Type

Comment

0cb

TX_RU_TO

R/W

15:0

Initial ramp-up, hold time

h0000

Time to wait after initial

ramp up (tag reset

duration). Specified from

start of ramp-up in 12 MHz

clock cycles.

0cd

TX_PDIST_COEFF

R/W

15:0

Predistortion coefficient, c0

h0000

s6.9

0ce

TX_PDIST_COEFF

R/W

15:0

Predistortion coefficient, c1

h0000

s6.9

0cf

TX_PDIST_COEFF

R/W

15:0

Predistortion coefficient, c2

h0000

s6.9

0d0

TX_PDIST_COEFF

R/W

15:0

Predistortion coefficient, c3

h0000

s6.9

0d1

TX_PDIST_COEFF

R/W

15:0

Predistortion coefficient, c4

h0000

s6.9

0d2

TX_PDIST_COEFF

R/W

15:0

Predistortion coefficient, c5

h0000

s6.9

0d3

EOT_RU_TIME

R/W

11:0

CORDIC disable delay

h0000

Time to wait (in 48 MHz

clock cycles) before re-

centering the carrier in

SSB mode after the EOT

command has been read

from the TX FIFO.

Observe that this time

must be shorter than the

RX delay in the EOT

command.

0d4

BIX_MAX

R/W

15:0

h0000

0d5

PR_ASK_DELAY

R/W

15:8

7:0

PR-ASK delay 2

PR-ASK delay 1

h0000

For delaying the

txpsk_phase signal.

Specified in two parts,

each is specified in

48 MHz clock cycles.

0d6

PA_EN_OFFSET

R/W

15:8

7:0

Delay after PA enable

Delay after PA buffer enable

h0000

Provided to give PA parts

a while to settle. Specified

in 48 MHz cycles.

0D8

TXFILT_HOLD_EN

_DELAY

R/W

15:0

h0000

Delay from start of EOT

command until sample and

hold in the TX filter is

activated. Specified in 24

MHz cycles.

0D9

TXFILT_HOLD_

DISABLE_DELAY

R/W

15:0

h0000

Delay from the end of the

RX cycle until the sample

and hold in the TX filter is

released. Specified in 24

MHz cycles.

0DA

TXFILT_HOLD_

PERIOD

R/W

15:0

h0000

Period of the refresh

signal. Specified in 3 MHz

cycles. The automatic

refresh mechanism is

disabled if the period is set

to h0000.

0DB

RXLO_RU_DELAY

R/W

15:0

rxlo_ru_delay

h0000

Specified in 12 MHz clock

cycles

0DC

RXLO_TX_DELAY

R/W

7:0

rxlo_tx_delay

h0000

Specified in 48 MHz clock

cycles

R2000 数据表(PDF) 37 Page - List of Unclassifed Manufacturers

R2000 数据表(HTML) 37 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

数据表下载

链接网址

R2000 数据表(PDF) 37 Page - List of Unclassifed Manufacturers

R2000 数据表(HTML) 37 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

数据表 下载

链接网址

数据表下载