R2000 datasheet(62/75 Pages) ETC

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Indy® R2000 Electrical, Mechanical, & Thermal Specification

Addr.

Name

R/W

Bit

Description

Reset

Type

Comment

41b

SPARE_OUT

R/W

15:12

11:8

7:3

2:0

Spare output

Dithering clock division, N

Dithering offset

Dithering Mode

h0000

Dithering clock division:

0: Clock disabled

1: 24 MHz

2: 12 MHz

3: 6 MHz

4: 3 MHz

5: 1.5 MHz

6: 750 kHz

7: 375 kHz

8: 188 kHz

9: 94 kHz

10: 47 kHz

11: 23 kHz

12: 12 kHz

13: 6 kHz

14: 3 kHz

15: 1.5 kHz

Dithering Mode:

0: Discreet dithering:

Feedback

1: Discreet dithering:

DTEST0

2: Discreet dithering: ADC

dithering (LFSR)

3: Discreet dithering: TX

ΣΔ (I output)

4: Random dithering

5: Ramp dithering

41b

SPARE_OUT

R/W

15:9

8:7

6:4

3:0

Spare output

Dithering source

Dithering clock division, N

Dithering offset

h0000

Dithering Source:

0: Feedback

1: DTEST0

2: ADC dithering (LFSR)

3: TX ΣΔ (I output)

Dithering clock division:

0: Clock disabled

1: 24 MHz

2: 12 MHz

3: 6 MHz

4: 3 MHz

5: 1.5 MHz

6: 750 kHz

7: 375 kHz

41C

ANA_PLL_CTRL1

R/W

pll_n[16]

h0000

Analog control signals.

pll_n is the divider ratio of

the N-divider in the PLL.

41D

ANA_PLL_CTRL2

R/W

15:0

pll_n[15:0]

h0E4C

Analog control signals.

pll_n is the divider ratio of

the N-divider in the PLL.

420

ANA_INPUT1

vco_amp_hi

vco_amp_lo

iffilter_amp_hi

iffilter_amp_lo

Filter tuning finished

(rxtun_stop)

iflna_amp_hi

iflna_amp_lo

Analog input signals:

vco_amp_hi:

VCO

amplitude too high

vco_amp_lo:

VCO

amplitude too low

iflna_amp_hi:

IF LNA

amplitude too high

iflna_amp_lo:

IF LNA

amplitude too low

421

ANA_INPUT2

7:0

Chip revision

Indy revision.

422

SPARE_IN

15:0

Spare input

R2000 数据表(PDF) 62 Page - List of Unclassifed Manufacturers

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R2000 数据表(PDF) 62 Page - List of Unclassifed Manufacturers

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