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DSPIC30F 数据表(PDF) 129 Page - Microchip Technology

部件名 DSPIC30F
功能描述  High-Performance Digital Signal Controllers
PDF  220 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

DSPIC30F 数据表(HTML) 129 Page - Microchip Technology

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 2004 Microchip Technology Inc.
Preliminary
DS70116C-page 127
dsPIC30F5011/5013
19.0
12-BIT ANALOG-TO-DIGITAL
CONVERTER (A/D) MODULE
The 12-bit Analog-to-Digital converter (A/D) allows
conversion of an analog input signal to a 12-bit digital
number. This module is based on a Successive
Approximation Register (SAR) architecture and pro-
vides a maximum sampling rate of 100 ksps. The A/D
module has up to 16 analog inputs which are multi-
plexed into a sample and hold amplifier. The output of
the sample and hold is the input into the converter
which generates the result. The analog reference volt-
age is software selectable to either the device supply
voltage (AVDD/AVSS) or the voltage level on the
(VREF+/VREF-) pin. The A/D converter has a unique
feature of being able to operate while the device is in
Sleep mode with RC oscillator selection.
The A/D module has six 16-bit registers:
• A/D Control Register 1 (ADCON1)
• A/D Control Register 2 (ADCON2)
• A/D Control Register 3 (ADCON3)
• A/D Input Select Register (ADCHS)
• A/D Port Configuration Register (ADPCFG)
• A/D Input Scan Selection Register (ADCSSL)
The ADCON1, ADCON2 and ADCON3 registers con-
trol the operation of the A/D module. The ADCHS reg-
ister selects the input channels to be converted. The
ADPCFG register configures the port pins as analog
inputs or as digital I/O. The ADCSSL register selects
inputs for scanning.
The block diagram of the 12-bit A/D module is shown in
Figure 19-1.
FIGURE 19-1:
12-BIT A/D FUNCTIONAL BLOCK DIAGRAM
Note:
The SSRC<2:0>, ASAM, SMPI<3:0>,
BUFM and ALTS bits, as well as the
ADCON3 and ADCSSL registers, must
not be written to while ADON = 1. This
would lead to indeterminate results.
Comparator
12-bit SAR
Conversion Logic
VREF+
AVSS
AVDD
DAC
16-word, 12-bit
Dual Port
Buffer
AN12
0000
0101
0111
1001
1101
1110
1111
1100
0001
0010
0011
0100
0110
1000
1010
1011
AN13
AN14
AN15
AN8
AN9
AN10
AN11
AN4
AN5
AN6
AN7
AN0
AN1
AN2
AN3
CH0
CH0R
CH0G
VREF-
Sample/Sequence
Control
Sample
Input Mux
Control
Input
Switches
S/H



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