MP3326

– 16-CHANNEL LED DRIVER WITH I2C AND SEPARATED PDIM/ADIM

MP3326 Rev. 1.0

www.MonolithicPower.com

12

1/4/2021

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© 2021 MPS. All Rights Reserved.

OPERATION

The MP3326 applies 16 internal current sources

in each LED string terminal. The LED current of

each channels is set by an external current-

setting resistor. The maximum current is 50mA.

Enable (EN) and Start-Up

When the input voltage exceeds the under-

voltage lockout (UVLO) threshold and the EN pin

exceeds its rising threshold, the MP3326 enters

standby mode, and the I2C is active. After setting

the I2C register, set the EN bit high to start up the

system. The start-up sequence is as follows:

1. VIN

2. EN

3. I2C setting

4. Set EN bit

Channel Selection

The channel can be disabled by setting the

corresponding CHxEN bit (e.g. x = 1, 2, ..., 16)

low, or by connecting the channel to GND.

Dimming

Each channel has its own 6-bit analog dimming

register and 12-bit PWM dimming register. The

MP3326 supports analog dimming and PWM

dimming for each channel.

In analog dimming, the LED current amplitude

changes when the analog dimming register

changes. Change the code in the ICHx register

(e.g. x = 1, 2, ..., 16) to choose analog dimming

for the corresponding channel. The LED current

(ILED) amplitude can be estimated with Equation

(1):

LED

ICHx

I

=

ISET

63



(1)

Where ICHx is the analog dimming code for the

corresponding channel.

For example, if ICHx = 0, ILED is 0A.

In PWM dimming, LED current is a PWM

waveform. The LED current amplitude stays the

same, and the LED current duty varies with the

PWM dimming register.

The PWM dimming duty is set by the PWMx

register (e.g x = 1, 2, ..., 16). The duty can be

calculated with Equation (2):

PWMx

D=

4095

(2)

Where PWMx is the PWM dimming duty code for

each corresponding channel. The duty changes

only when the 8MSB of PWM duty register are

written. When PWMx = 0, the corresponding

LED channel current is 0A.

The PWM dimming frequency can be selected

via register FPWM1:0. The potential frequencies

are listed below:

 FPWM 1:0 = 00, 220Hz

 FPWM 1:0 = 01, 250Hz (default)

 FPWM 1:0 = 10, 280Hz

 FPWM 1:0 = 11, 330Hz

To avoid a glitch during operation, the following

conditions must be met:

 Change the FPWM1:0 value only when the

EN bit is set 0.

 Write the FPWM register and wait for a 10µs

delay before writing other registers.

Phase Shift

A channel-by-channel phase shift function can

be implemented. This function is enabled by

setting the PS_EN bit high.

When the phase shift function is enabled, the

channel x + 1 (e.g. x = 1, 2, ..., 15) LED current

rising edge is delayed for 40µs after channel

x’s

LED current rising edge.

SYNC Output for LCD Refresh Frequency

The fault indicator function can be enabled by

the FLTEN bit. If FLTEN = 0, the fault indicator

function is disabled. RFSH/FLT keeps the output

refresh signal even if a protection is triggered.

If FLTEN = 1, the fault indicator function is

enabled. The SYNC/FLT pin is pulled low if a

protection occurs. Table 1 shows the details of

RFSH/FLT pin output status.