ST7L15 datasheet(69/138 Pages) STMICROELECTRONICS

69 / 138 page

ST7L15, ST7L19

69/138

DUAL 12-BIT AUTORELOAD TIMER 4 (cont’d)

Bit 1 = TRAN2 Transfer Enable 2

This bit is read/write by software, cleared by hard-

ware after each completed transfer and set by

hardware after reset. It controls the transfers on

CNTR2.

It allows the value of the Preload DCRx registers

to be transferred to the Active DCRx registers after

the next overflow event.

The OPx bits are transferred to the shadow OPx

bits in the same way.

Notes:

1. DCR2/3 transfer is controlled using this bit if

ENCNTR2 bit is set.

2. This bit must not be reset by software.

Bit 0 = TRAN1 Transfer Enable 1

This bit is read/write by software, cleared by hard-

ware after each completed transfer and set by

hardware after reset. It controls the transfers on

CNTR1. It allows the value of the Preload DCRx

registers to be transferred to the Active DCRx reg-

isters after the next overflow event.

The OPx bits are transferred to the shadow OPx

bits in the same way.

Notes:

1. DCR0,1 transfers are always controlled using

this bit.

2. DCR2/3 transfer is controlled using this bit if

ENCNTR2 is reset.

3.This bit must not be reset by software

AUTORELOAD REGISTER2 (ATR2H)

Read / Write

Reset Value: 0000 0000 (00h)

AUTORELOAD REGISTER2 (ATR2L)

Read / Write

Reset Value: 0000 0000 (00h)

Bits 15:12 = Reserved, must be kept cleared

Bits 11:0 = ATR2[11:0] Autoreload Register 2

This is a 12-bit register which is written by soft-

ware. The ATR2 register value is automatically

loaded into the upcounter CNTR2 when an over-

flow of CNTR2 occurs. The register value is used

set

the

PWM2/PWM3

frequency

when

ENCNTR2 is set.

DEAD TIME GENERATOR REGISTER (DTGR)

Read/Write

Reset Value: 0000 0000 (00h)

Bit 7 = DTE Dead Time Enable

This bit is read/write by software. It enables a dead

time generation on PWM0/PWM1.

0: No Dead time insertion.

1: Dead time insertion enabled.

Bits 6:0 = DT[6:0] Dead Time Value

These bits are read/write by software. They define

the dead time inserted between PWM0/PWM1.

Dead time is calculated as follows:

Dead Time = DT[6:0] x Tcounter1

Note:

1. If DTE is set and DT[6:0] = 0, PWM output sig-

nals are at their reset state.

ATR11 ATR10 ATR9

ATR8

ATR7

ATR6

ATR5

ATR4

ATR3

ATR2

ATR1

ATR0

DTE

DT6

DT5

DT4

DT3

DT2

DT1

DT0

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