ST7L15 datasheet(48/138 Pages) STMICROELECTRONICS

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ST7L15, ST7L19

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I/O PORTS (cont’d)

10.7 DEVICE-SPECIFIC I/O PORT CONFIGURATION

The I/O port register configurations are summa-

rized as follows:

Standard Ports

PA7:0, PB6:0

PC1:0 (multiplexed with OSC1,OSC2)

The selection between OSC1 or PC0 and OSC2 or

PC1 is done by the option byte (refer to section

15.1 on page 126). Interrupt capability is not avail-

able on PC1:0.

Port C is not present on ROM devices.

Note: PCOR not implemented but p-transistor al-

ways active in output mode (refer to Figure 29 on

page 45).

Interrupt Ports

Ports where the external interrupt capability is

selected using the EISR register

Table 10. Port Configuration (Standard Ports)

Note: On ports where the external interrupt capability is selected using the EISR register, the configuration is as follows:

Table 11. I/O Port Register Map and Reset Values

MODE

DDR

floating input

pull-up input

open drain output

push-pull output

MODE

DDR

floating input

push-pull output

MODE

DDR

floating input

pull-up interrupt input

open drain output

push-pull output

Port

Pin name

Input

Output

OR = 0

OR = 1

OR = 0

OR = 1

Port A

PA7:0

floating

pull-up

open drain

push-pull

Port B

PB6:0

floating

pull-up

open drain

push-pull

Port

Pin name

Input

Output

OR = 0

OR = 1

OR = 0

OR = 1

Port A

PA7:0

floating

pull-up interrupt

open drain

push-pull

Port B

PB6:0

floating

pull-up interrupt

open drain

push-pull

Address

(Hex.)

Label

765

4321

0000h

PADR

Reset Value

MSB

1111

LSB

0001h

PADDR

Reset Value

MSB

0000

LSB

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