RT9758 datasheet(47/61 Pages) RICHTEK

47 / 61 page

RT9758

is a registered trademark of Richtek Technology Corporation.

DS9758-03

May 2023

www.richtek.com

Watchdog Timer (WDT)

When the device is controlled by host, all of the register can be programmed by host. The host has to read or write

any register to reset watchdog counter before watchdog timeout and it can also disable WDT function by setting

WDT_EN bits to 0. When the watchdog timer expired in standby mode and 4 operation mode, WDT_STAT and

WDT_FLAG turn to high and INT pin is pulsed for interrupt the host. After watchdog reset wait time (tWDT_WAIT), the

different related registers are reset to default values (Refer to Register Descriptions for detail) according by operation

mode and the BEHAVIOR_AFTER_WDT bit setting. The Figure 9 shows the WDT flow chart. For example, when

the watchdog timer expired in bypass mode and the BEHAVIOR_AFTER_WDT bit is 1, the OVP, OCP and OTP

registers are reset to default value but the CHG_EN bit and Q0_CONTROL bit will keep as same as before. In other

case, when the watchdog timer is expired, the OVP, OCP and OTP registers are reset to default value and the

CHG_EN bit and Q0_CONTROL bit will also reset to 0 and 00, separately. If the device stays in watchdog timer

suspend status, host can read or write any registers to return counting. For decrease quiescent current in present

mode, the WDT timer will force disable.

WDT counting

WDT disable or

read/write I

WDT Timeout ?

WDT_FLAG = 1

WDT_STAT = 1

Set INT interrupt

WDT disable or

read/write I

WDT timer reset

Delay 32msec

(tWDT_WAIT)

WDT timer reset

C read/write any register

BEHAVIOR_AFTER_WDT = 1 &

Device operates in bypass mode

Timer suspend

Reset OVP & OCP threshold

Reset OVP & OCP & OTP disable bit

Set CHG_EN = 0

Set Q0_CONTROL = 00

WDT timer reset

Reset OVP & OCP threshold

Reset OVP & OCP & OTP disable bit

WDT timer reset

Figure 9. WDT Flow Chart

Pre-Charge Mechanism

To avoid the inrush current caused by the voltage difference between capacitors and the voltage source, the device

establishes a pre-charge mechanism to charge the CFLY capacitors and the COUT capacitor before charging the

battery. The device begins to charge the battery if the pre-charge time is timeout and no fault occurs during the pre-

charge period. The pre-charge time depends on the setting of registers CFLY_DIAG_TIME and VOUT_ERR_

ON_TIME. Each pre-charge time and pre-charged capacitors for 4 operation modes are indicated in Table 9. In the

case of the DIV2 mode, the pre-charge time is CFLY_DIAG_TIME plus VOUT_ERR_ON_TIME, and the CFLY and

COUT capacitors are pre-charged at the same time.

RT9758 数据表(PDF) 47 Page - Richtek Technology Corporation

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