RT9758 datasheet(49/61 Pages) RICHTEK

49 / 61 page

RT9758

is a registered trademark of Richtek Technology Corporation.

DS9758-03

May 2023

www.richtek.com

WRX_OK Function (WRX_OK)

The RT9758 includes WRX_OK pin function to inform system. In standby mode and 4 operation mode with default

setting, if WRX_IN voltage over then WRX_INSERT level, WRX_OK pin will pull high. User can change status of

WRX_OK pin from high to low while WRX_INSERT is detected by using OVERRIDE_WRX_OK_PIN_LOW bit. If

OVERRIDE_WRX_OK_PIN_LOW bit set to 1, the status of WRX_OK pin pull to low while WRX_INSERT is detected.

If user desires WRX_OK function active in present mode, user can set WRX_OK_PSM bit and WRX_OK_EN bit both

to 1 to active it. In addition, user can disable WRX_OK function by WRX_OK_EN bit in each mode.

Q0 MOSFET Control (Q0_CONTROL)

The RT9758 includes Q0 MOSFET to prevent reverse voltage from VBUS pin. It can be controlled by Q0_CONTROL

bit. If Q0_CONTROL bit set to 10, Q0 will turn on after 2msec delay time (tQ0_DELAY) when WRX_INSERT is detected

and without VBUS OVP fault. In 2msec delay time (tQ0_DELAY), WRX_IN pull down resistor will be active. If

Q0_CONTROL bit set to 11, Q0 will turn on immediately when VBUS_INSERT is detected. If user desires to turn off

Q0 MOSFET, just set Q0_CONTROL bit to 00 or 10.

I2C Serial Interface

The RT9758 integrates I2C interface for host to program charging parameter and monitor device status. The interface

requires a serial clock line (SCL) and a serial data line (SDA). The host should initiate a data transfer on the bus and

generates the clock signals to permit that transfer. The device operates with address 50H, 51H or 52H to receive

control input from the host. The SCL and SDA pin are open drain structures. Users should connect a supply voltage

via a current source or pull-up resistors on SCL and SDA. The Figure 11 shows the I2C waveform information, the

data line must be stable during the high period of SCL line. The high or low state of SDA can only change when SCL

line is low.

SDA

SCL

tLOW

tHD;STA

tHD;DAT

tHIGH

tSU;DAT

tSU;STA

tHD;STA

tSP

tBUF

tSU;STO

Figure 11. I2C Waveform Information

The RT9758 operates as an I2C slave device with address 50H, 51H or 52H (depends on voltage condition of ADDR

pin). Every byte on SDA line must be 8 bit long. The Figure 12 shows the byte format of SDA and SCL line. All of

transactions begin with a START pattern and can be terminated with a STOP pattern. After START, the master

should send a slave address. The slave address is 7-bits long followed by the eighth bit as a data direction bit (R/W).

The direction bit setting to 0 indicates a transmission and 1 indicates a request for data. The master should take an

acknowledge bit after every byte. The master should release SDA line during the acknowledge clock pulse so the

slave device can pull low the SDA line to signal the master that the byte was successfully received. The RT9758

supports multi read/write and SCL line can be up to 3.4MHz.

RT9758 数据表(PDF) 49 Page - Richtek Technology Corporation

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