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ADRF5022BCCZN-R7 数据表(PDF) 7 Page - Analog Devices

部件名 ADRF5022BCCZN-R7
功能描述  Silicon SPDT Switch, Nonreflective, 100 MHz to 45 GHz
PDF  12 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADRF5022BCCZN-R7 数据表(HTML) 7 Page - Analog Devices

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Data Sheet
ADRF5022
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
analog.com
Rev. 0 | 7 of 12
Figure 4. Pin Configuration (Top View)
Table 6. Pin Function Descriptions
Pin Number
Mnemonic
Description
1, 2, 4 to 7, 9, 10, 13, 16, 17, 19, 20
GND
Ground. The GND pins must be connected to the RF and DC ground of the PCB.
3
RFC
RF Common Port. The RFC pin is DC-coupled to 0 V and AC matched to 50 Ω. No DC blocking capacitor is
required when the RF line potential is equal to 0 V DC. For the interface schematic, see Figure 5.
8
RF1
RF Throw Port 1. The RF1 pin is DC-coupled to 0 V and AC matched to 50 Ω. No DC blocking capacitor is
required when the RF line potential is equal to 0 V DC. for the interface schematic, see Figure 5.
11
VDD
Positive Supply Voltage. For the interface schematic, see Figure 6.
12
CTRL
Control Input Voltage. For the interface schematic, see Figure 8.
14
EN
Enable Input Voltage. For the interface schematic, see Figure 9.
15
VSS
Negative Supply Voltage. For the interface schematic, see Figure 7.
18
RF2
RF Throw Port 2. The RF2 pin is DC-coupled to 0 V and AC matched to 50 Ω. No DC blocking capacitor is
required when the RF line potential is equal to 0 V DC. For the interface schematic, see Figure 5.
EPAD
Exposed Pad. The exposed pad must be connected to the RF/DC ground of the PCB.
INTERFACE SCHEMATICS
Figure 5. RFx Pins (RFC, RF1, RF2) Interface Schematic
Figure 6. VDD Pin Interface Schematic
Figure 7. VSS Pin Interface Schematic
Figure 8. CTRL Pin Interface Schematic
Figure 9. EN Pin Interface Schematic



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