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AD9549 数据表(PDF) 52 Page - Analog Devices

部件名 AD9549
功能描述  Dual Input Network Clock Generator/Synchronizer
PDF  78 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9549 数据表(HTML) 52 Page - Analog Devices

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AD9549
Preliminary Technical Data
Rev. PrA | Page 52 of 78
POWER MANAGEMENT
The AD9549 features multiple power supplies, and their power
consumption varies with its configuration. This section covers
which power supplies can be grouped together, and how each
block’s power consumption varies with frequency.
The numbers quoted here are for comparison only. Please refer
to the spec table for exact numbers. With each group, bypass
caps of 1 uF in parallel with a 10 uF should be used.
The recommendations here are for typical applications, and an
application demanding the highest performance may require
additional power supply isolation.
3.3V SUPPLIES
Digital I/O (Pin 1) and VDDX_REF (Pin 14): These two 3.3V
supplies can be grouped together. The power consumption on
Pin 1 varies dynamically with serial port activity. Noise from
the serial port that couples into the reference input should be
filtered by the digital PLL.
AVDD3 (Pin 37): This is the CMOS driver supply. If the CMOS
driver will be used, this supply should be isolated from other
3.3V supplies to avoid a spur at the output frequency. The
power consumption is a function of the output frequency and
loading of this pin. If this supply will not be used, this supply
can be tied to other 3.3V supplies, and its consumption will be
less than 5 mA.
AVDD3 (Pins 46,47,49): These are 3.3V DAC power supplies
that typically consume about 25mA. At a minimum, a ferrite
bead should be used to isolate these from other 3.3V supplies,
with a separate regulator being ideal.
1.8V SUPPLIES
Digital Core (Pins 3,5,7): These Pins can be grouped together.
Their current consumption increases from about 160mA at a
system clock of 700 MHz to about 220mA a system clock of 1
GHz. There is also a slight (~5%) increase as Fout increases
from 50 MHz to 400 MHz.
VDD DAC Decoder (Pin 53): This 1.8V supply consumes about
20 to 40 mA. It is critical that this supply be well isolated from
other 1.8V supplies. At a minimum, a ferrite bead should be
used for isolation, with a separate regulator being ideal.
AVDD (Pins 11, 19, 23, 24, 36, 42, 45): These pins may be
grouped together and should be isolated from other 1.8V
supplies. At a minimum, a ferrite bead should be used for
isolation, with a separate regulator being ideal.
AVDD (Pin 25, 26, 29, 30): These pins may be grouped together
and should be isolated from other 1.8V supplies. At a
minimum, a ferrite bead should be used for isolation, with a
separate regulator being ideal.



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