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ST7538Q 数据表(PDF) 13 Page - STMicroelectronics |
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ST7538Q 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 44 page ![]() ST7538Q Electrical characteristics 13/44 5V voltage regulator VDC Linear regulator output voltage 0 < Io < 50mA 7.5V < PAVcc < 12.5V -5% 5.05 +5% V PGVDC Power Good Output Voltage Threshold on VDC pin 4.3 4.5 4.7 V PG VDC (HYS) PG on VDC pin Hysteresis 250 mV 3.3V voltage regulator DVdd Linear Regulator Output Voltage 0 < Io < 50mA 7.5V < PAVcc < 12.5V -5% 3.3 +5% V PGDVdd Power Good Output Voltage Threshold on DVdd pin 3.125 V PG DVdd (HYS) PG on DVdd pin Hysteresis 250 mV Other functions TRSTO Reset Time See Figure 21; Xtal = 16MHz 50 ms TWD Watch-dog Pulse Width See Figure 21 3.5 ms TWM Watch-dog Pulse Period See Figure 21 TWD + 3.5 1490 ms TWO Watch-dog Time Out See Figure 21 1.5 s TOUT TX TIME OUT Control Register Bit 7 and Bit 8 See Figure 20 1 3 s TOFF Time Out OFF Time See Figure 20 125 ms TOFFD RxTx 0->1 vs. TOUT Delay See Figure 20 20 µs TCD Carrier Detection Time selectable by register Control Register bit 9 and bit10 Figure 11 500 1 3 5 µs ms ms ms TDCD CD_PD Propagation Delay Figure 11 300 500 µs MCLK Master Clock Output Selectable by register Control Register bit 15 and bit 16 see Table 11 fclock fclock/2 fclock/4 off MHz BAUD Baud rate Control Register bit 3 and bit 4 see Table 11 600 1200 2400 4800 Baud Table 4. Electrical characteristics (continued) (AVdd = DVdd = +5V, PAVcc =+9 V, PAVss, SGND = DVss = 0V, -40°C ≤TA ≤ 85°C, TJ < 125 °C, fc = 86kHz, other control register parameters as default value, unless otherwise specified) Symbol Parameter Test condition Min Typ Max Unit |
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