ISP1122ABD datasheet(9/48 Pages) PHILIPS

9 / 48 page

Philips Semiconductors

ISP1122A

USB stand-alone hub

Preliminary speciﬁcation

Rev. 01 — 27 March 2000

9 of 48

9397 750 06986

6.2 Philips Serial Interface Engine (SIE)

The Philips SIE implements the full USB protocol layer. It is completely hardwired for

speed and needs no ﬁrmware intervention. The functions of this block include:

synchronization pattern recognition, parallel/serial conversion, bit (de-)stufﬁng, CRC

checking/generation, Packet IDentiﬁer (PID) veriﬁcation/generation, address

recognition, handshake evaluation/generation.

6.3 Hub repeater

The hub repeater is responsible for managing connectivity on a ‘per packet’ basis. It

implements ‘packet signalling’ and ‘resume’ connectivity. Low-speed devices can be

connected to downstream ports. If a low-speed device is detected the repeater will

not propagate upstream packets to the corresponding port, unless they are preceded

by a PREAMBLE PID.

6.4 End-of-frame timers

This block contains the speciﬁed EOF1 and EOF2 timers which are used to detect

‘loss-of-activity’ and ‘babble’ error conditions in the hub repeater. The timers also

maintain the low-speed keep-alive strobe which is sent at the beginning of a frame.

6.5 General and individual port controller

The general and individual port controllers together provide status and control of

individual downstream ports. Any port status change will be reported to the host via

the hub status change (interrupt) endpoint.

6.6 GoodLink

Indication of a good USB connection is provided through GoodLink technology. An

LED can be directly connected via an external 330

Ω resistor.

During enumeration the LED blinks on momentarily. After successful conﬁguration of

the ISP1122A, the LED is permanently on. The LED blinks off for 100 ms upon each

successful packet transfer (with ACK). The hub GoodLink indicator blinks when the

hub receives a packet addressed to it. Downstream GoodLink indicators blink upon

an acknowledgment from the associated port. In ‘suspend’ mode the LED is off.

This feature provides a user-friendly indication of the status of the hub, the connected

downstream devices and the USB trafﬁc. It is a useful diagnostics tool to isolate faulty

USB equipment and helps to reduce ﬁeld support and hotline costs.

6.7 Bit clock recovery

The bit clock recovery circuit recovers the clock from the incoming USB data stream

using a 4

× oversampling principle. It is able to track jitter and frequency drift as

speciﬁed by the

USB Speciﬁcation Rev. 1.1.

6.8 Voltage regulator

A 5 to 3.3 V DC-DC regulator is integrated on-chip to supply the analog transceiver

and internal logic. This can also be used to supply the terminal 1.5 k

Ω pull-up resistor

on the D

+ line of the upstream connection.

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