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ISP1122ABD 数据表(PDF) 37 Page - NXP Semiconductors

部件名 ISP1122ABD
功能描述  Universal Serial Bus stand-alone hub
PDF  48 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

ISP1122ABD 数据表(HTML) 37 Page - NXP Semiconductors

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Philips Semiconductors
ISP1122A
USB stand-alone hub
Preliminary specification
Rev. 01 — 27 March 2000
37 of 48
9397 750 06986
© Philips Electronics N.V. 2000. All rights reserved.
[1]
fSCL = 1⁄64fXTAL.
[2]
Rise time is determined by Cb and pull-up resistor value Rp (typ. 4.7 kΩ).
Full-speed timing symbols have a subscript prefix ‘F’, low-speed timings a prefix ‘L’.
Fig 20. Hub EOP delay and EOP skew.
handbook, full pagewidth
MGR778
tEOP+
tEOP−
tEOP+
tEOP−
crossover
point
extended
crossover
point
extended
EOP delay:
tEOP = max (tEOP−, tEOP+)
EOP delay relative to tHDD:
tEOPD = tEOP − tHDD
EOP skew:
tHESK = tEOP+ − tEOP−
(A) downstream EOP delay
(B) upstream EOP delay
upstream
differential
data lines
downstream
port
crossover
point
extended
crossover
point
extended
upstream
end of cable
downstream
differential
data lines
+3.3 V
0 V
+3.3 V
0 V
Table 34: Dynamic characteristics: I2C-bus pins (SDA, SCL)
VCC and Tamb within recommended operating range; VDD = +5 V; VSS =VGND ; VIL and VIH between VSS and VDD.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fSCL
SCL clock frequency
fXTAL = 6 MHz
0
93.75 [1]
100
kHz
tBUF
bus free time
4.7
-
-
µs
tSU;STA
START condition set-up time
250
-
-
ns
tHD;STA
hold time START condition
4.0
-
-
µs
tLOW
SCL LOW time
4.7
-
-
µs
tHIGH
SCL HIGH time
4.0
-
-
µs
tr
SCL and SDA rise time
[2] -
-
1000
ns
tf
SCL and SDA fall time
-
-
300
ns
tSU;DAT
data set-up time
250
-
-
ns
tHD;DAT
data hold time
0
-
-
µs
tVD;DAT
SCL LOW to data out valid
time
-
-
0.4
µs
tSU;STO
STOP condition set-up time
4.0
-
-
µs
Cb
capacitive load for each bus
line
-
-
400
pF



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