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L6701TR 数据表(PDF) 17 Page - STMicroelectronics

部件名 L6701TR
功能描述  3 Phase Controller for VR10, VR9 and K8 CPUs
PDF  44 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L6701TR 数据表(HTML) 17 Page - STMicroelectronics

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L6701
7 Configuring the Device: DAC Selection
17/44
7
Configuring the Device: DAC Selection
Multiple DACs need to be configured before the system start-up by programming the apposite
pin DAC_SEL. The embedded DAC allows to regulate the output voltage with a tolerance of
±0.7% recovering from offsets and manufacturing variations. In case of selecting VR9 and
VR10 Mode, the device automatically introduces a -19mV offset to the regulated voltage (see
Table 5 and Table 6) in order to avoid any external offset circuitry to worsen the guaranteed
accuracy and, as a consequence, the calculated system TOB. In case of selecting the K8 DAC,
VID5 gives the option to introduce +25mV offset to the regulation (See Table 7).
Output voltage is programmed through the VID pins: they are inputs of an internal DAC that is
realized by means of a series of resistors providing a partition of the internal voltage reference.
The VID code drives a multiplexer that selects a voltage on a precise point of the divider. The
DAC output is delivered to an amplifier obtaining the voltage reference available on REF_OUT.
According to the selected DAC, the device also changes the protection thresholds as a
consequence of different CPU specifications, see Table 8 for details.
7.1
Single-Wire CPU Automatic Detection
L6701 has been designed to automatically detect the Intel CPU connected by monitoring the
DAC_SEL pin status at the start-up so modifying the DAC table accordingly (see Table 8). In
fact, by directly connecting the DAC_SEL pin with #BOOTSEL pin of the CPU, the controller
automatically recognize the different technology steps of the CPU so modifying the DAC table
accordingly.
See CPU related documentation for further details about compatibility.
Table 8.
L6701 Configuration
DAC_SEL
OPERATIVE MODE
OVP & Pre-
OVP
UVP
PGOOD
OPEN
AMD K8 +25mV (Driven by VID5)
1.9V Fixed
-400mV
-230mV
82k
Ω to GND
Intel VR10 -19mV
1.9V Fixed
-400mV
SSEND
GND
Intel VR9 -19mV
2.1V Fixed
-400mV
-230mV



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