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L6701TR 数据表(PDF) 39 Page - STMicroelectronics

部件名 L6701TR
功能描述  3 Phase Controller for VR10, VR9 and K8 CPUs
PDF  44 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L6701TR 数据表(HTML) 39 Page - STMicroelectronics

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L6701
16 Layout Guidelines
39/44
16.2
Small Signal Components and Connections
These are small signal components and connections to critical nodes of the application as well
as bypass capacitors for the device supply (See Figure 20). Locate the bypass capacitor (VCC
and Bootstrap capacitor) close to the device and refer sensible components such as frequency
set-up resistor ROSC to SGND. Star grounding is suggested: connect SGND to PGND plane in
a single point to avoid that drops due to the high current delivered causes errors in the device
behavior.
VSEN pin filtered vs. SGND helps in reducing noise injection into device: take care in routing
driving net for this pin in order to minimize coupled noise.
Remote Buffer Connection must be routed as parallel nets from the FBG/FBR pins to the load
in order to avoid the pick-up of any common mode noise. Connecting these pins in points far
from the load will cause a non-optimum load regulation, increasing output tolerance.
Locate current reading components close to the device. It's also important to minimize any
offset in the measurement and, to get a better precision, to connect the traces as close as
possible to the sensing elements.
Caution:
Boot Capacitor Extra Charge. Systems that do not use Schottky diodes might show big
negative spikes on the phase pin. This spike can be limited as well as the positive spike but has
an additional consequence: it causes the bootstrap capacitor to be over-charged. This extra-
charge can cause, in the worst case condition of maximum input voltage and during particular
transients, that boot-to-phase voltage overcomes the abs. max. ratings also causing device
failures. It is then suggested in this cases to limit this extra-charge by:
adding a small resistor in series to the boot diode (one resistor can be enough for all
the three diodes if placed upstream the boot diode anode, see Figure 20)
using non-capacitive boot diodes (such as standard diodes).
Figure 20. Power connections and related connections layout (same for all phases).
L
CIN
VIN
UGATEx
PHASEx
LGATEx
PGNDx
LOAD
BOOTx
PHASEx
VCC
SGND
+Vcc
L
CIN
VIN
LOAD
To limit C
BOOT
Extra-Charge



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