L6701TR datasheet(24/44 Pages) STMICROELECTRONICS

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10 Output Voltage Positioning

L6701

24/44

Table 9.

Comparison between different load-line implementations.

10.3

Offset (Optional)

Positive offset can be added to the programmed reference by connecting a ROS resistor

between the REF_OUT and REF_IN pins. Referring to Figure 7, a constant current

(IOS=11.5µA) is sourced from the REF_IN pin as soon as the device is enabled, so

programming a fixed voltage drop across ROS: this voltage is directly added to the programmed

reference giving the desired offset to the output voltage as follow:

Offset current is suddenly sourced from REF_IN pin as soon as the device implements Soft-

Start: to avoid having steps during soft-start, the introduction of COS (in parallel to ROS) is

required. The resulting time constant need to be negligible with respect to the soft-start time as

well as long enough to smooth the initial step. Typical values are in the range of few hundreds

of nF.

Offset function can be easily disabled simply setting ROS = 0.

Caution:

Offset automatically given by the DAC selection differs from the offset implemented through the

OFFSET pin: the built-in feature is trimmed in production and assures ±0.7% accuracy over

load and line variations.

10.4

Remote Voltage Sense

L6701 embeds a Remote Sense Buffer to sense remotely the regulated voltage without any

additional external components. In this way, the output voltage programmed is regulated

between the remote buffer inputs compensating motherboard or connector losses. The device

senses the output voltage remotely through the pins FBR and FBG (FBR is for the regulated

voltage sense while FBG is for the ground sense) and reports this voltage internally at VSEN

pin with unity gain eliminating the errors. Keeping the FBR and FBG traces parallel and

guarded by a power plane results in common mode coupling for any picked-up noise.

Fully-Differential LL

Non-Fully-Differential LL

Layout-insensitive BOM

Time-Constant Matching

RD Design (given OCP th.)

RFB Design (given RLL)

RLL (given RD and RFB)

DCR

-------------

⋅

DCR

-------------

⋅

---------------------------

OCP

DCR

-------------

⋅

OCP

-------------

DCR

-------------

⋅

----------

DCR

-------------

⋅

DCR

-------------

⋅

DCR

------------- RFB

⋅⋅

DCR

------------- RFB

⋅

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