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L6701TR 数据表(PDF) 20 Page - STMicroelectronics |
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L6701TR 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 44 page ![]() 9 Current Sharing Loop and Current Reading L6701 20/44 9 Current Sharing Loop and Current Reading 9.1 Current Sharing Loop L6701 embeds two separate Current Reading circuitries used to perform Current Sharing and OCP through ISENx pins and Voltage Positioning (Droop Function) through CS+ and CS- pins (See Section 10). Current sharing control loop and connections are reported in Figure 6: the current read through the ISENx pins is converted into a current IINFOx proportional to the current delivered by each phase and the information about the average current IAVG = ΣIINFOx / 3 is internally built into the device. The error between the read current IINFOx and the reference IAVG is then converted into a voltage that with a proper gain is used to adjust the duty cycle whose dominant value is set by the voltage error amplifier in order to equalize the current carried by each phase. 9.2 Current Reading for Current Sharing The current flowing trough each phase is read using the voltage drop across the low side MOSFETs RDS(on) or across a sense resistor in its series and it is internally converted into a current. The trans-conductance ratio is issued by the external resistor RISEN placed outside the chip between ISENx and the reading point (usually the LS MOSFET Drain). The current sense circuit tracks the current information for a time TTRACK centered in the middle of the LS conduction time and holds the tracked information during the rest of the period. The current that flows from the ISENx pin is the current information used by the device to perform current sharing and OCP and it is given by: where RDS(on) is the ON resistance of the low side MOSFET and RISEN is the trans- conductance resistor connected between the ISENx pins and the LS Drain; IPHASEx is the current carried by the relative phase and IINFOx is the current information signal reproduced internally. RISENx is designed according to the Over Current Protection: see Section 13.6 for details. Figure 6. Current Sharing Loop and Current Reading Connections I ISENx R dsO N R ISEN ----------------- IPHASEx ⋅ I INFO x == I INFO1 PWM1 Out From EA I INFO2 I AVG PWM2 Out I INFO3 PWM3 Out AVG ISENx LGATEx I PHASEx R ISEN IISENx |
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