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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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M700000002 数据表(PDF) 79 Page - SPANSION |
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M700000002 数据表(HTML) 79 Page - SPANSION |
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79 / 128 page  November 25, 2003 Am70PDL127BDH/Am70PDL129BDH 77 AD VAN C E INFORM ATION pSRAM DATA RETENTION Notes: 1. CE#1ps ≥ V CC – 0.2 V, CE2ps ≥ VCC – 0.2 V (CE#1ps controlled) or CE2ps ≤ 0.2 V (CE2ps controlled). 2. Typical values are not 100% tested. pSRAM POWER ON AND DEEP POWER DOWN Figure 28. Deep Power-down Timing Note: Data cannot be retained during deep power-down standby mode. Figure 29. Power-on Timing Parameter Symbol Parameter Description Test Setup Min Typ Max Unit V DR V CC for Data Retention CE#1ps ≥ V CC – 0.2 V (Note 1) 2.7 3.3 V IDR Data Retention Current VCC = 3.0 V, CE#1ps ≥ VCC – 0.2 V (Note 1) 1.0 (Note 2) 70 µA t CS CE2ps Setup Time 0 ns t CH CE2ps Hold Time 300 µs t DPD CE2ps Pulse Width 10 ms tCHC CE2ps Hold from CE#f1 0 ns t CHP CE2ps Hold from Power On 30 µs CE#1ps CE#2ps tDPD tCH tCS CE#1ps VDD CE#2ps tCHC tCHP tCH VDD min |
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