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M700000002 数据表(PDF) 94 Page - SPANSION |
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M700000002 数据表(HTML) 94 Page - SPANSION |
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94 / 128 page  92 Am70PDL127BDH/Am70PDL129BDH November 25, 2003 AD VAN C E INFORM ATION Table 6. System Interface String Table 7. Device Geometry Definition Addresses (x16) Data Description 1Bh 0027h V CC Min. (write/erase) D7–D4: volt, D3–D0: 100 millivolt 1Ch 0036h VCC Max. (write/erase) D7–D4: volt, D3–D0: 100 millivolt 1Dh 0000h V PP Min. voltage (00h = no VPP pin present) 1Eh 0000h V PP Max. voltage (00h = no VPP pin present) 1Fh 0007h Typical timeout per single byte/word write 2 N µs 20h 0007h Typical timeout for Min. size buffer write 2 N µs (00h = not supported) 21h 000Ah Typical timeout per individual block erase 2 N ms 22h 0000h Typical timeout for full chip erase 2 N ms (00h = not supported) 23h 0001h Max. timeout for byte/word write 2 N times typical 24h 0005h Max. timeout for buffer write 2 N times typical 25h 0004h Max. timeout per individual block erase 2 N times typical 26h 0000h Max. timeout for full chip erase 2 N times typical (00h = not supported) Addresses (x16) Data Description 27h 0017h Device Size = 2 N byte 28h 29h 0002h 0000h Flash Device Interface description (refer to CFI publication 100) 2Ah 2Bh 0005h 0000h Max. number of byte in multi-byte write = 2 N (00h = not supported) 2Ch 0001h Number of Erase Block Regions within device (01h = uniform device, 02h = boot device) 2Dh 2Eh 2Fh 30h 007Fh 0000h 0000h 0001h Erase Block Region 1 Information (refer to the CFI specification or CFI publication 100) 31h 32h 33h 34h 0000h 0000h 0000h 0000h Erase Block Region 2 Information (refer to CFI publication 100) 35h 36h 37h 38h 0000h 0000h 0000h 0000h Erase Block Region 3 Information (refer to CFI publication 100) 39h 3Ah 3Bh 3Ch 0000h 0000h 0000h 0000h Erase Block Region 4 Information (refer to CFI publication 100) |
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