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PCF85063ATL/1 数据表(PDF) 29 Page - NXP Semiconductors |
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PCF85063ATL/1 数据表(HTML) 29 Page - NXP Semiconductors |
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29 / 55 page ![]() NXP Semiconductors PCF85063A Tiny Real-Time Clock/calendar with alarm function and I2C-bus 8.2 START and STOP conditions Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line while the clock is HIGH is defined as the START condition - S. A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP condition - P (see Figure 19). mbc622 SDA SCL P STOP condition SDA SCL S START condition Figure 19. Definition of START and STOP conditions 8.3 System configuration A device generating a message is a transmitter; a device receiving a message is a receiver. The device that controls the message is the master; and the devices which are controlled by the master are the slaves (see Figure 20). mga807 SDA SCL CONTROLLER TRANSMITTER/ RECEIVER CONTROLLER TRANSMITTER TARGET TRANSMITTER/ RECEIVER TARGET RECEIVER CONTROLLER TRANSMITTER/ RECEIVER Figure 20. System configuration 8.4 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of 8 bits is followed by an acknowledge cycle. • A slave receiver, which is addressed, must generate an acknowledge after the reception of each byte • Also a master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter • The device that acknowledges must pull-down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse (set-up and hold times must be considered) • A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a STOP condition Acknowledgement on the I2C-bus is shown in Figure 21. PCF85063A All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 7.1 — 8 November 2023 29 / 55 |
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