PCF85063ATLSLASH1 datasheet(40/55 Pages) NXP

40 / 55 page

NXP Semiconductors

PCF85063A

Tiny Real-Time Clock/calendar with alarm function and I2C-bus

SCL

SDA

tHD;STA

tSU;DAT

tHD;DAT

tBUF

tSU;STA

tLOW tHIGH

tVD;ACK

013aaa417

tSU;STO

protocol

START

condition

(S)

bit 7

MSB

(A7)

bit 6

(A6)

bit 0

(R/W)

acknowledge

(A)

STOP

condition

(P)

1/fSCL

tVD;DAT

Figure 30. I2C-bus timing diagram; rise and fall times refer to 30 % and 70 %

13 Application information

The data sheet values were obtained using a crystal with an ESR of 60 kΩ. If a crystal with an ESR of 70 kΩ is

used then the power consumption would increase by a few nA and the start-up time will increase slightly.

PCF85063A

MASTER

TRANSMITTER/

RECEIVER

OSCI

OSCO

VSS

SDA

aaa-004438

SCL

SDA

(I2C-bus)

SCL

SDA

SCL

INT

VDD CLKOE

VDD(2)

R1(1)

100 nF

R: pull-up resistor

R =

CLKOUT

1 F

TP(3)

VDD(2)

A 1 farad super capacitor combined with a low VF diode can be used as a standby or back-up supply. With the RTC in its

minimum power configuration that is, timer off and CLKOUT off, the RTC may operate for weeks.

1. R1 limits the inrush current to the super capacitor at power-on.

2. NXP recommends tying VDD of the device and VDD of all the external pull-up resistors to the same Power Supply.

3. NXP also recommends the customer place accessible 'Pads/TP-test point' on the layout so as to enable a 'hard''

grounding of the power supply VDD in the event a full discharge cannot be attained.

Figure 31. Application diagram for PCF85063A

PCF85063A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7.1 — 8 November 2023

40 / 55

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