VM6101

Pin description

3/17

1

Pin description

2

Functional description

Figure 1.

Functional block diagram

Table 1.

Pin description

Pin

Name

Type

Description

1

SDA

I/O

Serial interface data. Requires external pull-up to VDD.

2

SCL

I/O

Serial interface clock. Requires external pull-up to VDD.

3

INT

I/O

Dual function output:

- Comparator logic output

- PWM generator output

Input for serial interface 7-bit address select:

- low = address 0x10 (default)

- high = address 0x11

Requires external pull-up or pull-down resistor (1 M

Ω typically).

4

GND

PWR Ground

5

VDD

PWR Positive power supply

6PD

AIN

Power down control:

- low = force low power standby

- high = normal operation

7

AMUX

AIO

Reserved. Do not connect.

8

TEST

AIN

Reserved. Connect to GND.

SDA

SCL

R

B

Y

G

Light to

Frequency

Converter

(x4)

27-bit

(x4)

Counter

3.6 MHz

Oscillator

Power-on

Reset

Register

Bank

Serial

Interface

PWM

Generator

Comparator

Logic

INT

Pin

Function

Mux

PD

VDD

GND