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24CSM01-E/P 数据表(PDF) 18 Page - Microchip Technology |
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24CSM01-E/P 数据表(HTML) 18 Page - Microchip Technology |
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18 / 63 page ![]() 24CSM01 DS20006781B -page 18 Preliminary 2023 Microchip Technology Inc. and its subsidiaries 6.6.2 ENHANCED SOFTWARE WRITE PROTECTION MODE When the EWPM bit is set to logic ‘1’, the 24CSM01 is configured for a versatile software write protection scheme by segmenting the EEPROM array into eight independent 128-Kbit zones (see Table 6-2). Each of the eight zones can be write-protected by programming the corresponding bit in the Configuration register. The protection behavior can be made permanent by locking the Configuration register (see Section 9.5 “Locking the Configuration Register” for additional details). Note: Enhanced software write protection does not affect write operations to the Security and Configuration registers. TABLE 6-2: 24CSM01 ZONE PROTECTION CONTROL Configuration Register Bit Protected Zone Protected Address Range SWP7 7 1C000h - 1FFFFh SWP6 6 18000 - 1BFFFh SWP5 5 14000h - 17FFFh SWP4 4 10000h - 13FFFh SWP3 3 0C000h - 0FFFFh SWP2 2 08000h - 0BFFFh SWP1 1 04000h - 07FFFh SWP0 0 00000h - 03FFFh |
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