AD8155

Data Sheet

Rev. A | Page 4 of 35

Parameter

Conditions

Min

Typ

Max

Unit

Supply Current

ICC

VCC = 1.8 V

LB_x = 0, PE = 0 dB on all ports, low power mode3

233

270

mA

LB_x = 1, PE = 6 dB on all ports, low power mode3

406

480

mA

LB_x = 0, PE = 0 dB on all ports, default

350

410

mA

LB_x = 1, PE = 6 dB on all ports, default

690

800

mA

VCC = 3.3 V

LB_x = 0, PE = 0 dB on all ports, low power mode3

254

300

mA

LB_x = 1, PE = 6 dB on all ports, low power mode3

435

500

mA

LB_x = 0, PE = 0 dB on all ports, default

380

450

mA

LB_x = 1, PE = 6 dB on all ports, default

735

850

mA

ITTO

VTTO = 1.8 V

LB_x = 0, PE = 0 dB on all ports, low power mode3

66

82

mA

LB_x = 1, PE = 6 dB on all ports, low power mode3

186

226

mA

LB_x = 0, PE = 0 dB on all ports, default

66

82

mA

LB_x = 1, PE = 6 dB on all ports, default

183

225

mA

VTTO = 3.3 V

LB_x = 0, PE = 0 dB on all ports, low power mode3

69

85

mA

LB_x = 1, PE = 6 dB on all ports, low power mode3

195

230

mA

LB_x = 0, PE = 0 dB on all ports, default

69

84

mA

LB_x = 1, PE = 6 dB on all ports, default

193

230

mA

ITTI

10

20

mA

IDVCC

2

4

mA

THERMAL CHARACTERISTICS

Operating Temperature Range

−40

+85

°C

θJA

Still air; JEDEC 4-layer test board, exposed pad

soldered

21.2

°C/W

θJC

Still air; thermal resistance through exposed pad

1.1

°C/W

Maximum Junction

Temperature

125

°C

LOGIC CHARACTERISTICS4

I2C, SDA, SCL, control pins

Input High (VIH)

DVCC = 3.3 V

0.7 × DVCC

DVCC

V

Input Low (VIL)

DVCC = 3.3 V

VEE

0.3 × DVCC

V

Input High (VIH)

DVCC = 1.8 V

0.8 × DVCC

DVCC

V

Input Low (VIL)

DVCC = 1.8 V

VEE

0.2 × DVCC

V

Output High (VOH)

2 kΩ pull-up resistor to DVCC

DVCC

V

Output Low (VOL)

IOL = +3 mA

VEE

0.4

V

1 Bicast is off, loopback is off on all ports, preemphasis is set to minimum on all ports, and equalization is set to minimum on all ports.

2 VICM is the input common-mode voltage.

3 Low power mode is obtained by following the steps identified in the Initialization Sequence for Low Power and LOS_INT Operation section.

4 EQ control pins (EQ_A, EQ_B, EQ_C) require 5 kΩ in series when DVCC > VCC.