MF1ICS2005 datasheet(4/7 Pages) NXP

部件名	MF1ICS2005

功能描述	Sawn bumped 120關m wafer addendum

PDF	7 Pages

Scroll/Zoom	100%

制造商	NXP [NXP Semiconductors]

网页	http://www.nxp.com

标志

4 / 7 page

141130

Product data sheet

Rev. 3.0 — 18 July 2007

4 of 7

NXP Semiconductors

MF1 IC S20 05

Sawn bumped 120µm wafer addendum

Chip orientation and bond pad locations

Fig 1.

Chip orientation and bond pad locations

PAD (center) x [µm]

y [µm]

VSS

0.0

TESTIO

252.2

602.3

17.4

596.1

712.4

0.0

(1) X - Scribeline width:

80 µm

106.5 µm

(2) Y- Scribeline width:

80 µm

103.0 µm

(3) Chip step, x -length:

1.11 mm

133.4 µm

(4) Chip step, y -length:

1.06 mm

(8) LB bump edge to chip edge, x-length:

88.6 µm

(1)

TESTIO

VSS

MF1ICS2005

(4)

(3)

(5)

(6)

(2)

(7)

(8)

(6) LA bump edge to chip edge, x-length:

(7) LB bump edge to chip edge, y-length:

(5) LA bump edge to chip edge, y-length:

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