TDF8541THSLASHN2 datasheet(22/54 Pages) NXP

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TDF8541

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Product data sheet

Rev. 3 — 13 December 2011

22 of 54

NXP Semiconductors

TDF8541

I2C-bus controlled 4

 45 W power amplifier

Cleared after read means that the I2C-bus bits are cleared after a read command. The

Clear command is done only if all five data bytes are read. If only four data bytes are read,

the I2C-bus latches are not cleared and the old value remains in the latches.

When selected, pin DIAG gives actual diagnostic information. If a failure is removed,

pin DIAG is released instantly, independently of the I2C-bus latches.

7.8 Amplifier combined with a DC-to-DC converter

The TDF8541 can be used in combination with a DC-DC up-converter as the supply for

the amplifier (connected to VP). If the DC-DC converter output voltage is controlled with

the audio signal, the amplifier’s dissipation can be reduced at lower output powers. To

ensure that the amplifier can follow supply voltage variations, the supply voltage ripple

capacitor connected to pin SVR, to filter the amplifier’s common mode output voltage,

must be disconnected internally. The SVR capacitor is still used to determine the DC input

voltage. If I2C-bus bit IB4[D7] = 1, the common mode output voltage directly follows the

supply voltage variations.

I2C-bus specification

Table 8.

TDF8541 hardware address select

Pin ADSEL

R/W

Hex

Remark

Open

1011

000 = write to TDF8541;

1 = read from TDF8541

reserved;

instruction and

data bytes

have other

meaning

100 k

 1%

30 k

  1%

10 k

  1%

Voltage > 4 V

Ground

no I2C-bus; legacy mode

Fig 16. Definition of START and STOP conditions

001aam703

SDA

SCL

STOP condition

START condition

SDA changes when SCL is HIGH:

start

− or stop condition

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