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PIC18F258-E/SP 数据表(PDF) 96 Page - Microchip Technology |
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PIC18F258-E/SP 数据表(HTML) 96 Page - Microchip Technology |
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96 / 402 page  PIC18FXX8 DS41159E-page 94 © 2006 Microchip Technology Inc. FIGURE 9-1: RA3:RA0 AND RA5 PINS BLOCK DIAGRAM FIGURE 9-2: RA4/T0CKI PIN BLOCK DIAGRAM FIGURE 9-3: OSC2/CLKO/RA6 PIN BLOCK DIAGRAM Data Bus P N WR LATA WR TRISA Data Latch TRIS Latch RD TRISA RD PORTA VSS VDD I/O pin(1) Note 1: I/O pins have diode protection to VDD and VSS. Analog Input Mode TTL Input Buffer To A/D Converter and LVD Modules RD LATA or WR PORTA SS Input (RA5 only) Q D Q CK Q D Q CK QD EN Data Bus WR TRISA RD PORTA Data Latch TRIS Latch RD TRISA Schmitt Trigger Input Buffer N VSS I/O pin(1) TMR0 Clock Input Note 1: I/O pin has diode protection to VSS only. Q D Q CK Q D Q CK QD EN RD LATA WR LATA or WR PORTA TTL Input Buffer Data Bus P N WR PORTA WR TRISA Data Latch TRIS Latch RD TRISA RD PORTA VSS VDD Oscillator Circuit From OSC1 1 0 (FOSC = 101, 111) Data Latch CLKO (FOSC/4) OSC2/CLKO RA6 pin(2) (FOSC = 100, Schmitt Trigger Input Buffer (FOSC = 110, 100) Q D Q CK Q D Q CK QD EN 101 , 110, 111) Note 1: CLKO is 1/4 of FOSC. 2: I/O pin has diode protection to VDD and VSS. |
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