Data Sheet

ADPA7002

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. A | 6 of 20

Figure 2. Pin Configuration

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 2, 10, 11

VDD3, VDD1, VDD2, VDD4

Drain Biases. External bypass capacitors are required.

3, 9

VGG1

Gate Bias Controls. External bypass capacitors are required.

4, 8

NIC

No Internal Connection. These pins have no internal connections. Connect to ground.

5, 7, 13, 15

GND

Ground. These pins must be connected to RF and dc ground.

6

RFIN

RF Signal Input. This pin is ac-coupled and matched to 50 Ω.

12

VDET

Detector Diode to Measure RF Output Power. Output power detection via this pin requires the application of a dc

bias voltage through an external series resistor. Used in combination with the VREF pin, the difference voltage (VREF −

VDET) is a temperature compensated dc voltage that is proportional to the RF output power.

14

RFOUT

RF Signal Output. This pin is ac-coupled and matched to 50 Ω.

16

VREF

Reference Diode for Temperature Compensation of VDET RF Output Power Measurements.

EPAD

Exposed Pad. The exposed pad must be connected to RF and dc ground.

INTERFACE SCHEMATICS

Figure 3. GND Interface Schematic

Figure 4. VREF Interface Schematic

Figure 5. VDET Interface Schematic

Figure 6. RFIN Interface Schematic

Figure 7. VGG1 Schematic

Figure 8. RFOUT Interface Schematic

Figure 9. VDD1 to VDD4 Interface Schematic