Data Sheet

ADPA7002

APPLICATIONS INFORMATION

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Rev. A | 18 of 20

Figure 56. Turn On—HMC980LP4E Outputs to the ADPA7002

Figure 57. Turn Off—HMC980LP4E Outputs to the ADPA7002

Constant Drain Current Biasing vs. Constant

Gate Voltage Biasing

The HMC980LP4E uses closed loop feedback to continuously ad-

just VGATE to maintain a constant gate current bias over dc supply

variation, temperature variation, and part to part variation. The

constant drain current bias method reduces calibration procedure

time and maintains consistent performance over time.

In comparison to a constant gate voltage bias where the current

increases when RF power is applied, a constant drain current has

a slightly lower output P1dB. RF performance is lower due to a

lower drain current at high input power levels as the HMC980LP4E

reaches 1 dB compression.

The output P1dB performance for the constant drain current bias

improves if the bias current setpoint is increased. By increasing

the bias current setpoint to approximately 1 A (see Figure 61), the

output P1dB and output power increases up to the level achievable

with constant gate voltage biasing. Figure 59 shows a POUT vs. an

input power (PIN) response with a constant current bias where the

bias current setpoint has increased.

The current and temperature limit of IDD under the constant current

operation is typically set by the thermal limitations in the absolute

maximum ratings table (see Table 5) and by the maximum contin-

uous power dissipation specification. Increasing the IDD does not

indefinitely increase the output P1dB as the power dissipation

increases. Therefore, consider the trade-off between power dissi-

pation and output P1dB performance when using constant drain

current biasing.

Testing the HMC980LP4E

After biasing the ADPA7002 with the HMC980LP4E at the applica-

tion nodes, compare the results to Figure 58 through Figure 61 to

verify that the biasing procedure is correct. Note the measurements

in Figure 58 through Figure 61 are of the die (the ADPA7002CHIP),

but the ADPA7002 measurements are similar.

Figure 58. IDD vs. PIN, VDD = 5 V, Frequency = 32 GHz, Constant Current Bias

and Constant Voltage Bias

Figure 59. POUT vs. PIN, VDD = 5 V, Frequency = 32 GHz, Constant Current

Bias and Constant Voltage Bias