MPX2003

– UP TO 140kHz ALL-IN-ONE FLYBACK CONTROLLER

MPX2003 Rev. 1.0

MonolithicPower.com

29

8/5/2022

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© 2022 MPS. All Rights Reserved.

The PEP pin can also provide over-voltage

protection

(OVP)

using

several

passive

components. The breakdown voltage (BV) of the

Zener diode should be equal to the over-voltage

threshold when an over-voltage condition occurs.

For example, the BV of the Zener diode is equal

to the VCC over-voltage threshold when a

secondary over-voltage condition occurs.

Figure 20 shows OVP through the PEP pin.

PEP

Q

R

Zener

Diode

VCC

OVP

0.5V

Figure 20: OVP through PEP

Cable Drop Compensation

The CP voltage is proportional to the IS voltage

(VIS). The default ratio between VIS and the

compensation voltage on FB is 3:3.7, which

means that when the IS voltage reaches its

maximum value (40mV), the compensation

voltage on the FB reference is about 50mV. The

cable drop’s compensation voltage on the output

can be calculated with Equation (20):

HL

CP

IS

OUT

L

(R

VR

R)

3.7

I

3R

=

+







(20)

Cable drop compensation is disabled when the

IS pin is shorted to GND on the secondary side.

Overload Protection through the IS Pin

Overload protection can be achieved through the

IS pin. Place one high-precision current-sense

resistor in the output power loop and measure

the voltage drop on this resistor through the IS

pin. When VIS exceeds VOLP, the MPX2003

enters secondary OLP (SOLP) after a certain

time (tOLP). This sensing resistor follows the

relationship estimated with Equation (21):

OLP

IS

OUT

R

V

(0.8 ~ 0.9)

I

=

(21)

Figure 21 shows OLP through the IS pin.

+

OLP

VOLP

Timer 1

IS

VOUT+

VOUT-

RIS

Figure 21: OLP through the IS Pin

If RIS can be shorted, OLP through the IS pin is

disabled.

Selecting the SR MOSFET

Power MOSFET selection is a tradeoff between

RDS(ON) and QG. To improve efficiency, use a

MOSFET with a lower RDS(ON). Generally, a

MOSFET with a lower RDS(ON) has a higher QG,

which

reduces

the

turn-on/off

speed

and

increases switching loss.

If QG is not optimized, the gate driving signal may

turn off prematurely. A MOSFET with an RDS(ON)

that is too low is not recommended because the

gate driver is pulled low

when the MOSFET’s

drain-source voltage (VDS, calculated by -ISD x

RDS(ON)) exceeds -VFWD.

The MOSFET’s RDS(ON) does not contribute to

conduction loss, because VDS is adjusted at

-VFWD during the driving period (when the

switching current is fairly small). The conduction

loss can be calculated with Equation (22):

CON

DS

SD

SD

FWD

P

-V

I

I

V

=







(22)

Figure 22 on page 30 shows the typical

waveform when a flyback application works in

DCM. Assume a 50% duty cycle, and the output

current is IOUT.