MPX2003

– UP TO 140kHz ALL-IN-ONE FLYBACK CONTROLLER

MPX2003 Rev. 1.0

MonolithicPower.com

31

8/5/2022

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PCB Layout Guidelines

PCB layout is vital to achieve reliable operation,

as well as excellent EMI performance and

efficient thermal performance. For the best

results, follow the guidelines below and refer to

Figure 23 and Figure 24 on page 32:

1. Minimize

the

power

stage

loop

area,

including the primary power loop (C1, C2, C3

- T1- Q1 - R3, R4 - C1), the snubber loop (T1

- D1 - R7 - B1 - R5, C5 - T1), and the

secondary power loop (T1 - C15 - Q3 - T1).

2. Separate the IC GND and power GND.

3. Connect the heat sink to the primary GND

plane to improve EMI and thermal dissipation.

4. Place the decoupling capacitors (for VCC,

PEP, CS, COMP, VDD, and FB) close to the

IC.

5. Route the EMI filter far from the hopping

point.

6. Ensure that there is no trace beneath the IC

for isolation requirements.

7. Keep the Y-capacitor as close as possible to

the IC to reduce CM noise.

Board 3 (EMI F ilter)

PD Daughter Board

Board 1 (Main Board)

Board 2

Settin g Position

Board 3

Settin g Position

PD Board

Settin g Position

EMI filter far from

the hopping point

Primary power loop

as small as possible

Proper Y capacitor position

to restrain CM noise;

Y capacitor cannot be too far from IC

Heat sink connects

to PGND

Board 2 (Bus Capacitor)

Figure 23: Recommended PCB Layout for 65W PD Adapter Design (Top Side)