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LT3074AVPBF 数据表(PDF) 12 Page - Analog Devices |
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LT3074AVPBF 数据表(HTML) 12 Page - Analog Devices |
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12 / 62 page  Data Sheet LT3074 analog.com Rev 0. 12 of 62 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS LQFN PACKAGE 22-LEAD (3mm X 4mm) TJMAX = 125°C, θJA = 33°C/W, θJCTOP = 47°C/W, θJCBOT = 3.5°C/W Figure 3. Pin Configuration Table 5. Pin Descriptions PIN NAME DESCRIPTION 1 CLKDIS Clock Disable. Pulling this pin high disables the internal high-frequency clocks and puts the part in a quiet mode. If not used, tie this pin to DGND. DO NOT FLOAT THIS PIN. 2 VIOC Voltage for In-to-Out Control. The LT3074 incorporates a unique tracking feature (VIOC) to control the upstream switching regulator to maintain a constant voltage across the LT3074 and hence minimize power dissipation. See the Applications Information section for more information on proper control of the upstream switching regulator. |
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