STM32F103C8T6 datasheet(12/67 Pages) STMICROELECTRONICS

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Description

STM32F103xx

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Advanced control timer (TIM1)

The advanced control timer (TIM1) can be seen as a three-phase PWM multiplexed on 6

channels. It can also be seen as a complete general-purpose timer. The 4 independent

channels can be used for

●

Input Capture

●

Output Compare

●

PWM generation (edge or center-aligned modes)

●

One Pulse Mode output

●

Complementary PWM outputs with programmable inserted dead-times.

If configured as a standard 16-bit timer, it has the same features as the TIMx timer. If

configured as the 16-bit PWM generator, it has full modulation capability (0-100%).

The counter can be frozen in debug mode.

Many features are shared with those of the standard TIM timers which have the same

architecture. The advanced control timer can therefore work together with the TIM timers via

the Timer Link feature for synchronization or event chaining.

I²C bus

Up to two I²C bus interfaces can operate in multi-master and slave modes. They can support

standard and fast modes.

They support dual slave addressing (7-bit only) and both 7/10-bit addressing in master

mode. A hardware CRC generation/verification is embedded.

They can be served by DMA and they support SM Bus 2.0/PM Bus.

Universal synchronous/asynchronous receiver transmitter (USART)

One of the USART interfaces is able to communicate at speeds of up to 4.5 Mbit/s. The

other available interfaces communicate at up to 2.25 Mbit/s. They provide hardware

management of the CTS and RTS signals, IrDA SIR ENDEC support, are ISO 7816

compliant and have LIN Master/Slave capability.

All USART interfaces can be served by the DMA controller.

Serial peripheral interface (SPI)

Up to two SPIs are able to communicate up to 18 Mbits/s in slave and master modes in full-

duplex and simplex communication modes. The 3-bit prescaler gives 8 master mode

frequencies and the frame is configurable from 8-bit to 16-bit. The hardware CRC

generation/verification supports basic SD Card/MMC modes.

Both SPIs can be served by the DMA controller.

Controller area network (CAN)

The CAN is compliant with specifications 2.0A and B (active) with a bit rate up to 1 Mbit/s. It

can receive and transmit standard frames with 11-bit identifiers as well as extended frames

with 29-bit identifiers. It has three transmit mailboxes, two receive FIFOs with 3 stages and

14 scalable filter banks.

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