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STM32F103C8T6 数据表(PDF) 41 Page - STMicroelectronics |
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STM32F103C8T6 数据表(HTML) 41 Page - STMicroelectronics |
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41 / 67 page  STM32F103xx Electrical characteristics 41/67 Prequalification trials Most of the common failures (unexpected reset and program counter corruption) can be reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1 second. To complete these trials, ESD stress can be applied directly on the device, over the range of specification values. When unexpected behavior is detected, the software can be hardened to prevent unrecoverable errors occurring (see application note AN1015). Electromagnetic Interference (EMI) The electromagnetic field emitted by the device are monitored while a simple application is executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with SAE J 1752/3 standard which specifies the test board and the pin loading. Table 26. EMI characteristics Symbol Parameter Conditions Monitored Frequency Band Max vs. [fHSE/fHCLK] Unit 8/48 MHz 8/72 MHz SEMI Peak level VDD = 3.3 V, TA = 2 5 °C, LQFP100 package compliant with SAE J 1752/3 0.1 to 30 MHz 12 12 dBµV 30 to 130 MHz 22 19 130 MHz to 1GHz 23 29 SAE EMI Level 4 4 - |
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