Data Sheet

AD8313

CIRCUIT DESCRIPTION

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Rev. F | 12 of 23

lowers the intercept by the same amount. Dependence on the

reference impedance can be avoided by restating the expression as

VOUT = 20 × VSLOPE × log × (VIN / 2.2 μV)

(2)

where VIN is the rms value of a sinusoidal input appearing across

Pins 2 and 3; here, 2.2 µV corresponds to the intercept, expressed

in voltage terms. For detailed information on the effect of signal

waveform and metrics on the intercept positioning for a log amp,

refer to the AD8307 data sheet.

With Pins 7 and 8 disconnected (controller mode), the output can

be stated as

VOUT → VS when VSLOPE log (PIN / 100) > VSET

(3)

VOUT → 0 when VSLOPE log (PIN / 100) < VSET

(4)

when the input is stated in terms of the power of a sinusoidal signal

across a net termination impedance of 50 Ω. The transition zone

between high and low states is very narrow since the output stage

behaves essentially as a fast integrator. The above equations can

be restated as

VOUT → VS when VSLOPE log (VIN / 2.2 μV) > VSET

(5)

VOUT → 0 when VSLOPE log (VIN / 2.2 μV) < VSET

(6)

Another use of the separate VOUT and VSET pins is in raising the

load-driving current capability by including an external NPN emitter

follower. More complete information about usage in these modes is

provided in the Applications Information section.