数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADP1828YRQZ-R7 数据表(PDF) 4 Page - Analog Devices

部件名 ADP1828YRQZ-R7
功能描述  Synchronous Buck PWM, Step-Down, DC-to-DC Controller
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP1828YRQZ-R7 数据表(HTML) 4 Page - Analog Devices

  ADP1828YRQZ-R7 Datasheet HTML 1Page - Analog Devices ADP1828YRQZ-R7 Datasheet HTML 2Page - Analog Devices ADP1828YRQZ-R7 Datasheet HTML 3Page - Analog Devices ADP1828YRQZ-R7 Datasheet HTML 4Page - Analog Devices ADP1828YRQZ-R7 Datasheet HTML 5Page - Analog Devices ADP1828YRQZ-R7 Datasheet HTML 6Page - Analog Devices ADP1828YRQZ-R7 Datasheet HTML 7Page - Analog Devices ADP1828YRQZ-R7 Datasheet HTML 8Page - Analog Devices ADP1828YRQZ-R7 Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 32 page
background image
ADP1828
Rev. 0 | Page 4 of 32
Parameter
Conditions
Min
Typ
Max
Unit
OSCILLATOR
Oscillator Frequency
SYNC = FREQ = GND
240
300
360
kHz
SYNC = GND, FREQ = VREG
480
600
720
kHz
RFREQ = 57.6 kΩ
240
300
360
kHz
RFREQ = 35.7 kΩ
370
450
530
kHz
RFREQ = 24.9 kΩ
480
600
720
kHz
SYNC Synchronization Range
FREQ = GND
300
600
kHz
FREQ = VREG
600
1200
kHz
SYNC Input Pulse Width
200
ns
SYNC Pin Capacitance
5
pF
CURRENT SENSE
CSL Threshold Voltage
Relative to PGND
−17
−38
−58
mV
CSL Output Current
CSL = PGND
42
50
56
μA
Current Sense Blanking Period
100
ns
GATE DRIVERS
DH Rise Time
CDH = 3 nF, VBST − VSW = 5 V
15
ns
DH Fall Time
CDH = 3 nF, VBST − VSW = 5 V
10
ns
DL Rise Time
CDL = 3 nF
15
ns
DL Fall Time
CDL = 3 nF
10
ns
DH or DL Driver RON, Sourcing Current3, 4
Sourcing 1.5 A with a 0.1 μs pulse
2
Ω
DH or DL Driver RON, Sinking Current3, 4
Sinking 1.5 A with a 0.1 μs pulse
1.5
Ω
DH or DL Driver RON, Sourcing Current
IN = VREG = 3 V; sourcing 1 A with a 0.1 μs pulse
2.3
Ω
DH or DL Driver RON, Sinking Current
IN = VREG = 3 V; sinking 1 A with a 0.1 μs pulse
2
Ω
DH to DL, DL to DH Dead Time
40
ns
CLOCK OUT
CLOCKOUT Pulse Width
360
ns
CLKOUT Rise or Fall Time
CCLKOUT = 47 pF
10
ns
SYNC to CLKOUT Propagation Delay, tPD
CCLKOUT = 47 pF, CSYNC = 5 pF
40
ns
SYNC to CLKOUT Propagation Delay, tPD
CCLKOUT = 47 pF, CSYNC = 5 pF, IN < 5 V
52
ns
LOGIC THRESHOLDS
SYNC, CLKSET, FREQ Logic High
1.8
V
SYNC, CLKSET Logic Low
0.4
V
FREQ Logic Low
0.25
V
CLKSET, SYNC, FREQ Input Leakage
Current
CLKSET, SYNC, FREQ = 0 V or VREG
1
μA
EN Input Threshold
1.1
1.5
1.8
V
EN Input Threshold Hysteresis
0.2
V
EN Current Source
EN = 0 V to 3.0 V
−0.1
−0.6
−1.5
μA
EN Input Impedance to 5 V Zener
EN = 5.5 V to 18 V
100
THERMAL SHUTDOWN
Thermal Shutdown Threshold4
145
°C
Thermal Shutdown Hysteresis4
15
°C



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com