ADP1828YRQZ-R7 datasheet(24/32 Pages) AD

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ADP1828

Rev. 0 | Page 24 of 32

SOFT START

The ADP1828 uses an adjustable soft start to limit the output

voltage ramp-up period, limiting the input inrush current. The

soft start is selected by setting the capacitor, CSS, from SS to

GND. The ADP1828 charges CSS to 0.8 V through an internal

90 kΩ resistor. The voltage on the soft start capacitor while it is

charging is

⎟

⎠

⎞

⎜

⎝

⎛

−

CSS

kΩ

(45)

The soft start period ends when the voltage on the soft start pin

reaches 0.6 V. Substituting 0.6 V for VSS and solving for the soft

start time tSS:

⎟

⎠

⎞

⎜

⎝

⎛

−

kΩ

(46)

386

(47)

Because R = 90 kΩ:

sec

μF/

(48)

where tSS is the desired soft start time in seconds.

SWITCHING NOISE AND OVERSHOOT REDUCTION

In any high speed step-down regulator, high frequency noise

(generally in the range of 50 MHz to 100 MHz) and voltage

overshoot are always present at the gate, the switch node (SW),

and the drains of the external MOSFETs. The high frequency

noise and overshoot are caused by the parasitic capacitance,

Cgd, of the external MOSFET and the parasitic inductance of

the gate trace and the packages of the MOSFETs. When the

high current is switched, electromagnetic interference (EMI)

is generated, which can affect the operation of the surrounding

circuits. To reduce voltage ringing at the drain of the MOSFET,

an RC snubber can be added between SW and PGND, as illu-

strated in Figure 40. In most applications, RSNUB is about 2 Ω,

and CSNUB about 1.2 nF. RSNUB and CSNUB can be calculated using

the following equations:

OSS

SNUB

(49)

OSS

SNUB

(50)

where:

is the high frequency ringing measured at the SW node.

COSS

is the total output capacitance of the top-side and low-side

MOSFETs, given in the MOSFET data sheet.

The size of the RC snubber components need to be chosen

correctly to handle the power dissipation. The power dissipated

in RSNUB is:

SNUB

In most applications, a size 0805 component is sufficient. The

use of the RC snubber reduces the overall efficiency, generally

by an amount in the range of 0.1% to 0.5%. However, the RC

snubber cannot reduce the voltage overshoot. A resistor, shown

as RRISE in Figure 40, at the BST pin could help to reduce

overshoot and is generally between 1 Ω and 5 Ω.

CSL

PGND

VOUT

COUT

RSNUB

CSNUB

VIN

RCL

ADP1828

BST

RRISE

Figure 40. Application Circuit with a Snubber

VOLTAGE TRACKING

The ADP1828 includes a feature that tracks a master voltage.

This feature is especially important when multiple ADP1828s

(or other controllers such as the ADP1829) are powering sepa-

rate power supply voltages, such as the core and I/O voltages of

a DSP or microcontroller. In these cases, improper sequencing

can cause damage to the load.

The ADP1828 tracking input is an additional positive input to

the error amplifier. The feedback voltage is regulated to the lower

of the 0.6 V reference, the SS voltage, or the voltage at TRK, so

a lower voltage on TRK limits the output voltage. This feature

allows implementation of two different types of tracking: coin-

cident tracking, where the output voltage is the same as the

master voltage until the master voltage reaches regulation, or

ratiometric tracking, where the output voltage is limited to a

fraction of the master voltage.

In all tracking configurations, the final value of the master

voltage should be higher than the slave voltage.

Note that the soft start time setting of the master voltage should

be longer than the soft start of the slave voltage. This forces the

rise time of the master voltage to be imposed on the slave voltage.

If the soft start setting of the slave voltage is longer, the slave

comes up more slowly and the tracking relationship is not

seen at the output. The slave channel should still have a soft

start capacitor to give a small but reasonable soft start time to

protect the part in case of restart after a current-limit event.

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