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ST10F273 数据表(PDF) 173 Page - STMicroelectronics

部件名 ST10F273
功能描述  16-bit MCU with 512 Kbyte Flash memory and 36 Kbyte RAM
PDF  179 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST10F273 数据表(HTML) 173 Page - STMicroelectronics

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ST10F273
Electrical characteristics
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Figure 59.
SSC master timing
1.
The phase and polarity of shift and latch edge of SCLK is programmable. This figure uses the leading clock
edge as shift edge (drawn in bold), with latch on trailing edge (SSCPH = 0b), Idle clock line is low, leading
clock edge is low-to-high transition (SSCPO = 0b).
2.
The bit timing is repeated for all bits to be transmitted or received.
1st out bit
Last out bit
2nd out bit
1)
2)
2nd In bit
1st in bit
Last in bit
SCLK
MTSR
MRST
t308
t307
t308
t307
t305
t305
t300
t301
t302
t304
t303
t306
t305



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