Data Sheet

AD3530/AD3530R

SPECIFICATIONS

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Rev. 0 | 3 of 45

ELECTRICAL CHARACTERISTICS

VDD = 2.7V to 5.5V, IOVDD = 1.08V to 1.98V, VREF = 2.5V (internal or external), load resistance (RL) = 2kΩ, load capacitance (CL) = 200pF.

All specifications are TJ = −40°C to +125°C and typical at TA = 25°C, unless otherwise noted.

Table 2. Electrical Characteristics

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

STATIC PERFORMANCE1

Resolution

16

Bits

Integral Nonlinearity Error (INL)

±3

±10

LSB

Range = 0 to VREF

±3

±10

LSB

Range = 0 to 2 × VREF

Differential Nonlinearity Error (DNL)

±1

LSB

Range = 0 to VREF and guaranteed monotonic

±1

LSB

Range = 0 to 2 × VREF and guaranteed monotonic

Zero-Code Error

+0.22

±1

mV

Range = 0 to VREF or range = 0 to 2 × VREF

Offset Error

−0.16

±1.5

mV

Range = 0 to VREF

−0.23

±1.6

mV

Range = 0 to 2 × VREF

Full-Scale Error

−0.05

±0.26

% of FSR

Range = 0 to VREF

−0.06

±0.18

% of FSR

Range = 0 to 2 × VREF

Gain Error

−0.05

±0.26

% of FSR

Range = 0 to VREF

−0.06

±0.18

% of FSR

Range = 0 to 2 × VREF

Total Unadjusted Error (TUE)

−0.04

±0.22

% of FSR

Range = 0 to VREF

−0.04

±0.16

% of FSR

Range = 0 to 2 × VREF

Zero-Code Error Drift

±1.3

µV/°C

Range = 0 to VREF or range = 0 to 2 × VREF

Offset Error Drift

±1.3

µV/°C

Range = 0 to VREF or range = 0 to 2 × VREF

Full-Scale Error Drift

±200

ppm/°C

Range = 0 to VREF or range = 0 to 2 × VREF

Gain Error Drift

±40

ppm/°C

Range = 0 to VREF or range = 0 to 2 × VREF

DC Power Supply Rejection Ratio (PSRR)

0.03

mV/V

DAC code = midscale and supply voltage (VDD) = 5V ± 10%

DC Crosstalk

±3

µV

Due to single channel, full-scale output change, internal

reference, and range = 0 to VREF

±0.6

µV/mA

Due to load current change, external reference, and range =

0 to 2 × VREF

±6

µV

Due to powering down (per channel), internal reference, and

range = 0 to VREF

OUTPUT CHARACTERISTICS

Output Power-Up State

32

kΩ

Pull-down resistance

Output Voltage Range

0

2.5

V

Range = 0 to VREF, internal reference, and VDD > VREF

0

5

V

Range = 0 to 2 × VREF, internal reference, and VDD > 2 ×

VREF

Maximum Capacitive Load

2

nF

RL = ∞

5

nF

RL = 1kΩ

Load Regulation

75

µV/mA

VDD = 5V ± 10%, DAC code = midscale, and −30mA ≤

output current (IOUT) ≤ +30mA

75

µV/mA

VDD = 3V ± 10%, DAC code = midscale, and −20mA ≤ IOUT ≤

+20mA

Short-Circuit Current 2

50

mA

Sourcing

40

mA

Sinking

Headroom

40

25

mV

Source current = 20mA

Footroom

90

50

mV

Sink current = 20mA

Load Impedance at Rails

1.25

Ω

VDD, sourcing

2.5

Ω

GND, sinking

Power-Up Time

5

µs

Exiting power-down mode and VDD = 5V