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KSZ9567R 数据表(PDF) 24 Page - Microchip Technology |
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KSZ9567R 数据表(HTML) 24 Page - Microchip Technology |
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24 / 233 page ![]() KSZ9567R DS00002329E-page 24 2022 Microchip Technology Inc. and its subsidiaries ww 1124 8000 # initiate test for pair A sleep 250 msec rw 1124 # read result for pair A ww 1124 9000 # initiate test for pair B sleep 250 msec rw 1124 # read result for pair B ww 1124 a000 # initiate test for pair C sleep 250 msec rw 1124 # read result for pair C ww 1124 b000 # initiate test for pair D sleep 250 msec rw 1124 # read result for pair D ww 1112 0700 # return register to default setting ww 0 1340 # return register to default setting (may vary by application) 4.1.10 REMOTE PHY LOOPBACK This loopback mode checks the line (differential pairs, transformer, RJ-45 connector, Ethernet cable) transmit and receive data paths between the KSZ9567R and its Ethernet PHY link partner, and is supported for 10/100/1000 Mbps at full-duplex. The loopback data path is shown in Figure 4-2 and functions as follows: • The Ethernet PHY link partner transmits data to the KSZ9567R PHY port. • Data received at the external pins of the PHY port is looped back without passing through the MAC and internal switch fabric. • The same KSZ9567R PHY port transmits data back to the Ethernet PHY link partner. |
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