| 数据搜索系统,热门电子元器件搜索 |
|
KSZ9567R 数据表(PDF) 15 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
KSZ9567R 数据表(HTML) 15 Page - Microchip Technology |
|
15 / 233 page ![]() 2022 Microchip Technology Inc. and its subsidiaries DS00002329E-page 15 KSZ9567R Miscellaneous Pins Interrupt INTRP_N OPU Active low, open-drain interrupt. Note: This pin requires an external pull-up resistor. Power Management Event PME_N O8 Power Management Event. This output signal indicates that an energy detect event has occurred. It is intended to wake up the system from a low power mode. Note: The assertion polarity is programmable (default active low). An external pull-up resistor is required for active-low operation; an external pull-down resistor is required for active-high operation. System Reset RESET_N IPU Active low system reset. The device must be reset either during or after power-on. An RC circuit is suggested for power-on reset. Crystal Clock / Oscillator Input XI ICLK Crystal clock / oscillator input. When using a 25MHz crystal, this input is connected to one lead of the crystal. When using an oscillator, this pin is the input from the oscillator. The crystal oscillator should have a tolerance of ±50ppm. Crystal Clock Output XO OCLK Crystal clock / oscillator output. When using a 25MHz crystal, this output is connected to one lead of the crystal. When using an oscillator, this pin is left unconnected. 25/125MHz Reference Clock Output SYNCLKO O24 25/125MHz reference clock output, derived from the crystal input or the recovered clock of any PHY. This signal may be used for Synchronous Ethernet. General Purpose Input/Output 1 GPIO_1 IPU/O8 This signal can be used as an input or output for use by the IEEE 1588 event trigger or timestamp capture units. It will be synchronized to the internal IEEE 1588 clock. This pin can also be controlled (as an output) or sampled (as an input) via device registers. Transmit Output Current Set Resistor ISET A Transmit output current set resistor. This pin configures the physical transmit output current. It must be connected to GND through a 6.04kΩ 1% resistor. No Connect NC - No Connect. For proper operation, this pin must be left unconnected. Power/Ground Pins +3.3/2.5/1.8V I/O Power VDDIO P +3.3V / +2.5V / +1.8V I/O Power +2.5V Analog Power AVDDH P +2.5V Analog Power +1.2V Analog Power AVDDL P +1.2V Analog Power +1.2V Digital Power DVDDL P +1.2V Digital Power Ground GND GND Ground (pins and pad) TABLE 3-2: PIN DESCRIPTIONS (CONTINUED) NAME SYMBOL BUFFER TYPE DESCRIPTION |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |